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One ARM system had zero base address and zero size for I/O BAR of PCIe endpoint. Is ARM lacking support of PCI I/O operation or EDK2 implementation on ARM is not working?
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One ARM system had zero base address and zero size for I/O BAR of PCIe endpoint. Is ARM lacking support of PCI I/O operation or EDK2 implementation on ARM is not working?
According to this document, ARM CPU should support PCI address space?
https://developer.arm.com/documentation/dui0102/g/ch08s02s01
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