diff --git a/app/boards/imx8mp_evk_mimx8ml8_adsp.conf b/app/boards/imx8mp_evk_mimx8ml8_adsp.conf index bb9d86024498..f1ed34f8dc99 100644 --- a/app/boards/imx8mp_evk_mimx8ml8_adsp.conf +++ b/app/boards/imx8mp_evk_mimx8ml8_adsp.conf @@ -2,3 +2,10 @@ CONFIG_IMX8M=y CONFIG_HAVE_AGENT=n CONFIG_FORMAT_CONVERT_HIFI3=n CONFIG_KPB_FORCE_COPY_TYPE_NORMAL=n +CONFIG_DMA=y +CONFIG_DMA_NXP_SDMA=y +CONFIG_TRACE=n +CONFIG_SHARED_INTERRUPTS=y +CONFIG_ZEPHYR_NATIVE_DRIVERS=y +CONFIG_SAI_HAS_MCLK_CONFIG_OPTION=y +CONFIG_CLOCK_CONTROL_FIXED_RATE_CLOCK=y diff --git a/src/drivers/imx/ipc.c b/src/drivers/imx/ipc.c index 1f05dbd9eb45..1b398088cb1c 100644 --- a/src/drivers/imx/ipc.c +++ b/src/drivers/imx/ipc.c @@ -33,7 +33,6 @@ LOG_MODULE_REGISTER(ipc_task, CONFIG_SOF_LOG_LEVEL); -#ifndef CONFIG_IMX8M /* thanks to the fact that ARM's GIC is supported * by Zephyr there's no need to clear interrupts * explicitly. This should already be done by Zephyr @@ -41,7 +40,6 @@ LOG_MODULE_REGISTER(ipc_task, CONFIG_SOF_LOG_LEVEL); * linkage purposes on ARM64-based platforms. */ #define interrupt_clear(irq) -#endif /* CONFIG_IMX8M */ SOF_DEFINE_REG_UUID(ipc_task); diff --git a/src/platform/Kconfig b/src/platform/Kconfig index 684f775049aa..757a456b883d 100644 --- a/src/platform/Kconfig +++ b/src/platform/Kconfig @@ -127,7 +127,6 @@ config IMX8M select IMX select IMX_SDMA select IMX_MICFIL - select SCHEDULE_DMA_MULTI_CHANNEL select IMX_INTERRUPT_IRQSTEER help Select if your target platform is imx8m-compatible diff --git a/src/platform/imx8m/include/platform/platform.h b/src/platform/imx8m/include/platform/platform.h index e80d1441b3b6..0b4bf87e8eb5 100644 --- a/src/platform/imx8m/include/platform/platform.h +++ b/src/platform/imx8m/include/platform/platform.h @@ -24,7 +24,7 @@ struct timer; #define LPSRAM_SIZE 16384 /* IPC Interrupt */ -#define PLATFORM_IPC_INTERRUPT IRQ_NUM_MU +#define PLATFORM_IPC_INTERRUPT 7 #define PLATFORM_IPC_INTERRUPT_NAME NULL /* Host page size */ diff --git a/src/platform/imx8m/platform.c b/src/platform/imx8m/platform.c index d08645e13f99..e1f956590d92 100644 --- a/src/platform/imx8m/platform.c +++ b/src/platform/imx8m/platform.c @@ -159,11 +159,6 @@ int platform_init(struct sof *sof) sof->cpu_timers = sof->platform_timer; #endif -#ifdef __ZEPHYR__ - /* initialize cascade interrupts before any usage */ - interrupt_init(sof); -#endif - platform_interrupt_init(); platform_clock_init(sof); scheduler_init_edf(); @@ -186,16 +181,6 @@ int platform_init(struct sof *sof) if (ret < 0) return -ENODEV; - /* Init SDMA platform domain */ - sof->platform_dma_domain = - dma_multi_chan_domain_init(&sof->dma_info->dma_array[1], - PLATFORM_NUM_DMACS - 1, - PLATFORM_DEFAULT_CLOCK, true); - - /* i.MX platform DMA domain will be full synchronous, no time dependent */ - sof->platform_dma_domain->full_sync = true; - scheduler_init_ll(sof->platform_dma_domain); - /* initialize the host IPC mechanims */ ipc_init(sof); diff --git a/tools/topology/topology1/CMakeLists.txt b/tools/topology/topology1/CMakeLists.txt index 5c9d9926d0c4..d2ddbcc70caf 100644 --- a/tools/topology/topology1/CMakeLists.txt +++ b/tools/topology/topology1/CMakeLists.txt @@ -48,24 +48,24 @@ set(TPLGS ## end i.MX8 (i.MX8QM and i.MX8QXP) topologies ## i.MX8MP topologies - "sof-imx8-compr-wm8960-mixer\;sof-imx8mp-compr-wm8960-mixer\;-DCODEC=wm8960\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-compr-wm8960-mixer\;sof-imx8mp-compr-wm8962-mixer\;-DCODEC=wm8962\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-wm8960-mixer\;sof-imx8mp-wm8960-mixer\;-DCODEC=wm8960\;-DRATE=48000\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-wm8960-mixer\;sof-imx8mp-wm8962-mixer\;-DCODEC=wm8962\;-DRATE=48000\;-DSAI_INDEX=3\;-DDMA_DOMAIN" + "sof-imx8-compr-wm8960-mixer\;sof-imx8mp-compr-wm8960-mixer\;-DCODEC=wm8960\;-DSAI_INDEX=3" + "sof-imx8-compr-wm8960-mixer\;sof-imx8mp-compr-wm8962-mixer\;-DCODEC=wm8962\;-DSAI_INDEX=3" + "sof-imx8-wm8960-mixer\;sof-imx8mp-wm8960-mixer\;-DCODEC=wm8960\;-DRATE=48000\;-DSAI_INDEX=3" + "sof-imx8-wm8960-mixer\;sof-imx8mp-wm8962-mixer\;-DCODEC=wm8962\;-DRATE=48000\;-DSAI_INDEX=3" "sof-imx8mp-wm8960-kwd\;sof-imx8mp-wm8960-kwd" "sof-imx8mp-micfil\;sof-imx8mp-micfil" "sof-imx8mp-btsco-dual-8ch\;sof-imx8mp-btsco-dual-8ch" - "sof-imx8-wm8960\;sof-imx8mp-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-wm8960\;sof-imx8mp-wm8904\;-DCODEC=wm8904\;-DRATE=44100\;-DPPROC=volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-wm8960\;sof-imx8mp-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-wm8960\;sof-imx8mp-eq-fir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-fir-volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-wm8960\;sof-imx8mp-eq-fir-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=eq-fir-volume\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-wm8960\;sof-imx8mp-gui-components-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=gui-components\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-wm8960\;sof-imx8mp-drc-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=drc\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-src-wm8960\;sof-imx8mp-src-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=src\;-DSAI_INDEX=3\;-DDMA_DOMAIN" - "sof-imx8-src-wm8960\;sof-imx8mp-src-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=src\;-DSAI_INDEX=3\;-DDMA_DOMAIN" + "sof-imx8-wm8960\;sof-imx8mp-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=3" + "sof-imx8-wm8960\;sof-imx8mp-wm8904\;-DCODEC=wm8904\;-DRATE=44100\;-DPPROC=volume\;-DSAI_INDEX=3" + "sof-imx8-wm8960\;sof-imx8mp-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=3" + "sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3" + "sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3" + "sof-imx8-wm8960\;sof-imx8mp-eq-fir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-fir-volume\;-DSAI_INDEX=3" + "sof-imx8-wm8960\;sof-imx8mp-eq-fir-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=eq-fir-volume\;-DSAI_INDEX=3" + "sof-imx8-wm8960\;sof-imx8mp-gui-components-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=gui-components\;-DSAI_INDEX=3" + "sof-imx8-wm8960\;sof-imx8mp-drc-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=drc\;-DSAI_INDEX=3" + "sof-imx8-src-wm8960\;sof-imx8mp-src-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=src\;-DSAI_INDEX=3" + "sof-imx8-src-wm8960\;sof-imx8mp-src-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=src\;-DSAI_INDEX=3" "sof-imx8mp-compr-pcm-wm8960\;sof-imx8mp-compr-pcm-wm8960" "sof-imx8mp-compr-pcm-cap-wm8960\;sof-imx8mp-compr-pcm-cap-wm8960" "sof-imx8mp-compr-wm8960\;sof-imx8mp-compr-wm8960\;-DCODEC=wm8960\;-DRATE=48000" diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 2e96668e119b..b5914874c88b 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -314,25 +314,18 @@ endif() if (CONFIG_SOC_MIMX8ML8_ADSP) zephyr_library_sources( - ${SOF_DRIVERS_PATH}/generic/dummy-dma.c - ${SOF_DRIVERS_PATH}/imx/sdma.c - ${SOF_DRIVERS_PATH}/imx/sai.c ${SOF_DRIVERS_PATH}/imx/ipc.c - ${SOF_DRIVERS_PATH}/imx/micfil.c - ${SOF_DRIVERS_PATH}/imx/interrupt-irqsteer.c ) # Platform sources zephyr_library_sources( ${SOF_PLATFORM_PATH}/imx8m/platform.c ${SOF_PLATFORM_PATH}/imx8m/lib/clk.c - ${SOF_PLATFORM_PATH}/imx8m/lib/dai.c - ${SOF_PLATFORM_PATH}/imx8m/lib/dma.c ) # SOF core infrastructure - runs on top of Zephyr zephyr_library_sources( - ${SOF_SRC_PATH}/drivers/interrupt.c + lib/dma.c ) zephyr_library_sources(${SOF_SRC_PATH}/schedule/zephyr_ll.c) diff --git a/zephyr/Kconfig b/zephyr/Kconfig index af6864444fda..803d668857f3 100644 --- a/zephyr/Kconfig +++ b/zephyr/Kconfig @@ -20,7 +20,6 @@ config ZEPHYR_NATIVE_DRIVERS config DMA_DOMAIN bool "Enable the usage of DMA domain." - default y if IMX8M help This enables the usage of the DMA domain in scheduling. diff --git a/zephyr/include/rtos/interrupt.h b/zephyr/include/rtos/interrupt.h index d0e3dd772b7c..101aa7e65bef 100644 --- a/zephyr/include/rtos/interrupt.h +++ b/zephyr/include/rtos/interrupt.h @@ -11,7 +11,7 @@ /* TODO: to be removed completely when the following platforms are switched * to native drivers. */ -#if defined(CONFIG_IMX8M) || defined(CONFIG_AMD) +#if defined(CONFIG_AMD) /* imx currently has no IRQ driver in Zephyr so we force to xtos IRQ */ #include "../../../xtos/include/rtos/interrupt.h" #else @@ -49,16 +49,7 @@ static inline void interrupt_unregister(uint32_t irq, const void *arg) static inline int interrupt_get_irq(unsigned int irq, const char *cascade) { -#ifdef CONFIG_IMX8M - if (cascade == irq_name_level2) - return SOC_AGGREGATE_IRQ(irq, IRQ_NUM_EXT_LEVEL2); - if (cascade == irq_name_level5) - return SOC_AGGREGATE_IRQ(irq, IRQ_NUM_EXT_LEVEL5); - - return SOC_AGGREGATE_IRQ(0, irq); -#else return irq; -#endif } /* enable an interrupt source - IRQ needs mapped to Zephyr, diff --git a/zephyr/lib/dma.c b/zephyr/lib/dma.c index 41ef5c293371..159e8446fd25 100644 --- a/zephyr/lib/dma.c +++ b/zephyr/lib/dma.c @@ -150,6 +150,26 @@ SHARED_DATA struct dma dma[] = { .z_dev = DEVICE_DT_GET(DT_NODELABEL(host_dma)), }, #endif +#if defined(CONFIG_SOC_MIMX8ML8_ADSP) +{ + .plat_data = { + .dir = SOF_DMA_DIR_MEM_TO_DEV | SOF_DMA_DIR_DEV_TO_MEM, + .devs = SOF_DMA_DEV_SAI, + .channels = 32, + .period_count = 2, + }, + .z_dev = DEVICE_DT_GET(DT_NODELABEL(sdma3)), +}, +{ + .plat_data = { + .dir = SOF_DMA_DIR_HMEM_TO_LMEM | SOF_DMA_DIR_LMEM_TO_HMEM, + .devs = SOF_DMA_DEV_HOST, + .channels = 32, + .period_count = 2, + }, + .z_dev = DEVICE_DT_GET(DT_NODELABEL(host_dma)), +}, +#endif /* CONFIG_SOC_MIMX8ML8_ADSP */ #ifdef CONFIG_SOC_MIMX8UD7_ADSP { .plat_data = { diff --git a/zephyr/wrapper.c b/zephyr/wrapper.c index bff29e70cd2a..c2129347241e 100644 --- a/zephyr/wrapper.c +++ b/zephyr/wrapper.c @@ -53,7 +53,7 @@ const char irq_name_level2[] = "level2"; const char irq_name_level5[] = "level5"; /* imx currently has no IRQ driver in Zephyr so we force to xtos IRQ */ -#if defined(CONFIG_IMX8M) || defined(CONFIG_AMD) +#if defined(CONFIG_AMD) int interrupt_register(uint32_t irq, void(*handler)(void *arg), void *arg) { #ifdef CONFIG_DYNAMIC_INTERRUPTS