-
Notifications
You must be signed in to change notification settings - Fork 0
/
04_hexto7segmentdecoder.jed
253 lines (230 loc) · 10.4 KB
/
04_hexto7segmentdecoder.jed
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
Note: The first character in the file is 0x02(Start Transmission)*
N Comment Lines just have to start with an N, all lines end with a *
N: This file was based on a file written by Minipro open source software v0.4dev*
N: The information in this file is compiled from the following sources and experimentation*
N: JEDEC File Format Specification*
N: http://www.pldtool.com/pdf/fmt_jedec.pdf *
N: Lattice Original GAL16v8 Datasheet *
N: http://ee-classes.usc.edu/ee459/library/datasheets/16v8.pdf *
N: ATMEL/Microchip ATF16v8B Datasheet *
N: http://ww1.microchip.com/downloads/en/devicedoc/atmel-0364-pld-atf16v8b-8bq-8bql-datasheet.pdf *
N: Minipro software gitlab site *
N: https://gitlab.com/DavidGriffith/minipro/ *
N: Peepaw McDonald's video Generic Array Logic Hand Disassembly of the JEDEC File *
N: https://www.youtube.com/watch?v=h_d4npbKpdY *
N: FUNCTION *
N: NOT IMPLEMENTED *
N: This is just a baseline file to build hand GAL configurations from. *
N It does almost nothing, having a low output on all the I/O lines regardless of input *
N: Simple Mode *
N: A = Pin 2 *
N: B = Pin 1 *
N: C = Pin 3 *
N: D = Pin 19 *
N: E = Pin 4 *
N: F = Pin 18 *
N: G = Pin 5 *
N: H = Pin 17 *
N: I = Pin 6 *
N: J = Pin 14 *
N: K = Pin 7 *
N: L = Pin 13 *
N: M = Pin 8 *
N: N = Pin 12 *
N: O = Pin 9 *
N: P = Pin 11 *
Normal segment names for a 7-segment display*
N: _ a *
N: |_| fgb *
N: |_| edc *
N: Glyphs for encoding *
N: _ _ _ _ _ _ _ _ _ _ _ _ *
N: | | | _| _| |_| |_ |_ | |_| |_| |_| |_ | _| |_ |_ *
N: |_| | |_ _| | _| |_| | |_| _| | | |_| |_ |_| |_ | *
N: a = 0000 | 0010 | 0011 | 0101 | 0110 | 0111 | 1000 | 1001 | 1010 | 1100 | 1110 | 1111 *
N: b = 0000 | 0001 | 0010 | 0011 | 0100 | 0111 | 1000 | 1001 | 1010 | 1101 *
N: c = 0000 | 0001 | 0011 | 0100 | 0101 | 0110 | 0111 | 1000 | 1001 | 1010 | 1011 | 1101 | *
N: d = 0000 | 0010 | 0011 | 0101 | 0110 | 1000 | 1001 | 1011 | 1100 | 1101 | 1110 | *
N: e = 0000 | 0010 | 0110 | 1000 | 1010 | 1011 | 1100 | 1101 | 1110 | 1111 *
N: f = 0000 | 0100 | 0101 | 0110 | 1000 | 1001 | 1010 | 1011 | 1100 | 1110 | 1111 *
N: g = 0010 | 0011 | 0100 | 0101 | 0110 | 1000 | 1001 | 1010 | 1011 | 1101 | 1110 | 1111 *
N: Input pins 1(MSB) to 4(LSB) will give us a input pattern of BACE *
N: Though there are more than 8 input combinations that make each output active we could use negative logic to have less than eight combination to bring each signal low. *
N: A generally more efficient approach though is to use Kaurnaugh Maps[https://en.wikipedia.org/wiki/Karnaugh_map] to simplify the equations. An example for a follows: *
N: a: BA\CE *
N: \ 00 01 11 10 *
N: 00|1 |0 |1 |1 | *
N: 01|0 |1 |1 |1 | *
N: 11|1 |0 |1 |1 | *
N: 10|1 |1 |0 |1 | *
N: pin 19: a = B/E + AC + /A/E + /BC + B/A/C + /BAE *
N: pin 18: b = /A/E + /A/C + B/CE + /BCE + /B/C/E *
N: pin 17: c = B/A + /BA + /CE + /A/C + /AE *
N: pin 16: d = B/C + /B/A/E + AC/E + /ACE + A/CE *
N: pin 15: e = BA + C/E + BC + /A/E *
N: pin 14: f = B/A + /C/E + A/E + BC + /BA/C *
N: pin 13: g = B/A + C/E + /AC + BE + /BA/C *
N: (D) sets the device type*
Device: ATF16V8B*
N (QP) 20 Pins in the ATF16V8B*
QP20*
N: (QF) 2194 Fuses in the ATF16V8B*
QF2194*
N: (F) Default Fuse Setting 0*
F0*
N: (G) Security Fuse set this to 1 to turn on DRM (Boo!)*
G0*
N: (L) These are the Actual fuse setting Starting with the address and then the bits in order *
N: 0=connected, 1=disconnect *
N: The connected signals in each row are ANDed together.*
N: Each block of 8 rows is then ORed together to get the input to the output logic specified by the Mode fuses.*
N: Unused OR gate inputs are usually set to all 0s to hold the unused input low*
N: Block for PIN 19 *
N: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _*
N: AABBCCDDEEFFGGHHIIJJKKLLMMNNOOPP*
L0000 00000000000000000000000000000000*
L0032 00000000000000000000000000000000*
N: B/E *
L0064 11011111101111111111111111111111*
N: AC *
L0096 01110111111111111111111111111111*
N: /A/E *
L0128 10111111101111111111111111111111*
N: /BC *
L0160 11100111111111111111111111111111*
N: B/A/C *
L0192 10011011111111111111111111111111*
N: /BAE *
L0224 01101111011111111111111111111111*
N: Block for PIN 18 *
N: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _*
N: AABBCCDDEEFFGGHHIIJJKKLLMMNNOOPP*
L0256 00000000000000000000000000000000*
L0288 00000000000000000000000000000000*
L0320 00000000000000000000000000000000*
N: /A/E *
L0352 10111111101111111111111111111111*
N: /A/C *
L0384 10111011111111111111111111111111*
N: B/CE *
L0416 11011011011111111111111111111111*
N: /BCE *
L0448 11100111011111111111111111111111*
N: /B/C/E *
L0480 11101011101111111111111111111111*
N: Block for PIN 17 *
N: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _*
N: AABBCCDDEEFFGGHHIIJJKKLLMMNNOOPP*
L0512 00000000000000000000000000000000*
L0544 00000000000000000000000000000000*
L0576 00000000000000000000000000000000*
N: B/A *
L0608 10011111111111111111111111111111*
N: /BA *
L0640 01101111111111111111111111111111*
N: /CE *
L0672 11111011011111111111111111111111*
N: /A/C *
L0704 10111011111111111111111111111111*
N: /AE *
L0736 10111111011111111111111111111111*
N: Block for PIN 16 *
N: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _*
N: AABBCCDDEEFFGGHHIIJJKKLLMMNNOOPP*
L0768 00000000000000000000000000000000*
L0800 00000000000000000000000000000000*
L0832 00000000000000000000000000000000*
N: B/C *
L0864 11011011111111111111111111111111*
N: /B/A/E *
L0896 10101111101111111111111111111111*
N: AC/E *
L0928 01110111101111111111111111111111*
N: /ACE *
L0960 10110111011111111111111111111111*
N: A/CE *
L0992 01111011011111111111111111111111*
N: Block for PIN 15 *
N: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _*
N: AABBCCDDEEFFGGHHIIJJKKLLMMNNOOPP*
L1024 00000000000000000000000000000000*
L1056 00000000000000000000000000000000*
L1088 00000000000000000000000000000000*
L1120 00000000000000000000000000000000*
N: BA *
L1152 01011111111111111111111111111111*
N: C/E *
L1184 11110111101111111111111111111111*
N: BC *
L1216 11010111111111111111111111111111*
N: /A/E *
L1248 10111111101111111111111111111111*
N: Block for PIN 14 *
N: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _*
N: AABBCCDDEEFFGGHHIIJJKKLLMMNNOOPP*
L1280 00000000000000000000000000000000*
L1312 00000000000000000000000000000000*
L1344 00000000000000000000000000000000*
N: B/A *
L1376 10011111111111111111111111111111*
N: /C/E *
L1408 11111011101111111111111111111111*
N: A/E *
L1440 01111111101111111111111111111111*
N: BC *
L1472 11010111111111111111111111111111*
N: /BA/C *
L1504 01101011111111111111111111111111*
N: Block for PIN 13 *
N: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _*
N: AABBCCDDEEFFGGHHIIJJKKLLMMNNOOPP*
L1536 00000000000000000000000000000000*
L1568 00000000000000000000000000000000*
L1600 00000000000000000000000000000000*
N: B/A *
L1632 10011111111111111111111111111111*
N: C/E *
L1664 11110111101111111111111111111111*
N: /AC *
L1696 10110111111111111111111111111111*
N: BE *
L1728 11011111011111111111111111111111*
N: /BA/C *
L1760 01101011111111111111111111111111*
N: Block for PIN 12 *
N: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _*
N: AABBCCDDEEFFGGHHIIJJKKLLMMNNOOPP*
L1792 00000000000000000000000000000000*
L1824 00000000000000000000000000000000*
L1856 00000000000000000000000000000000*
L1888 00000000000000000000000000000000*
L1920 00000000000000000000000000000000*
L1952 00000000000000000000000000000000*
L1984 00000000000000000000000000000000*
L2016 00000000000000000000000000000000*
N: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _*
N: AABBCCDDEEFFGGHHIIJJKKLLMMNNOOPP*
N: XOR set to the the active state of each output (0=low, 1=high)*
N: 11111111*
N: 98765432*
L2048 11111111*
N: Signature*
L2056 0101010101010101010101010101010101010101010101010101010101010101*
N: AC1 sets whether the output pin is enabled(0-output pin, 1-input pin)*
N: 11111111*
N: 98765432*
L2120 00000000*
N: PTD for each input to the OR's from the fuse lines above this sets if they are (1-enabled, 0-disabled)*
L2128 1111111111111111111111111111111111111111111111111111111111111111*
N: SYN and AC0 Sets mode of chip*
N: 00 - Undefined *
N: 01 - Register Mode *
N: 10 - Simple Mode *
N: 11 - Complex Mode *
L2192 10*
N: (C) Checksum of the fuse (L & F) data. The minipro tool can ignore this and will actually tell you how to set it if you want to turn off the warning*
C970f*
N: The first character in the last line of the file is 0x03(End Transmission) followed by the file checksum lowercase hex*
N: minipro can ignore this and will actually tell you how to set it if you want to turn off the warning or release a file with an appropriate checksum*
4f0a