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Copy pathRFSoC-AMC.PrjPCBStructure
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RFSoC-AMC.PrjPCBStructure
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Record=TopLevelDocument|FileName=soc.SchDoc|SheetNumber=1
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_019 Zynq Decoupling|SchDesignator=U_019 Zynq Decoupling|FileName=SoC_Decoupling.SchDoc|SheetNumber=42|SymbolType=Normal|RawFileName=SoC_Decoupling.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_020 Zynq Decoupling 2|SchDesignator=U_020 Zynq Decoupling 2|FileName=SoC_Decoupling_2.SchDoc|SheetNumber=41|SymbolType=Normal|RawFileName=SoC_Decoupling_2.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_ADC_PLL|SchDesignator=U_ADC_PLL|FileName=ADC_PLL.SchDoc|SheetNumber=19|SymbolType=Normal|RawFileName=ADC_PLL.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_ADC_PLL|SchDesignator=U_ADC_PLL|FileName=ADC_PLL.SchDoc|SheetNumber=19|SymbolType=Normal|RawFileName=ADC_PLL.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_AMC_Connector|SchDesignator=U_AMC_Connector|FileName=AMC_Connector.SchDoc|SheetNumber=27|SymbolType=Normal|RawFileName=AMC_Connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_AMS_CLOCK|SchDesignator=U_AMS_CLOCK|FileName=AMS_CLOCK.SchDoc|SheetNumber=24|SymbolType=Normal|RawFileName=AMS_CLOCK.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_CDR_WR_oscillators|SchDesignator=U_CDR_WR_oscillators|FileName=CDR_WR_oscillators.SchDoc|SheetNumber=45|SymbolType=Normal|RawFileName=CDR_WR_oscillators.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_Clocking_SI5341B|SchDesignator=U_Clocking_SI5341B|FileName=Clocking_SI5341B.SchDoc|SheetNumber=40|SymbolType=Normal|RawFileName=Clocking_SI5341B.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_CPU_LPC1776_1|SchDesignator=U_CPU_LPC1776_1|FileName=CPU_LPC1776_1.SchDoc|SheetNumber=28|SymbolType=Normal|RawFileName=CPU_LPC1776_1.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_CPU_LPC1776_2|SchDesignator=U_CPU_LPC1776_2|FileName=CPU_LPC1776_2.SchDoc|SheetNumber=29|SymbolType=Normal|RawFileName=CPU_LPC1776_2.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_DAC_PLL|SchDesignator=U_DAC_PLL|FileName=DAC_PLL.SchDoc|SheetNumber=20|SymbolType=Normal|RawFileName=DAC_PLL.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_DDR4_SDRAM_PL1|SchDesignator=U_DDR4_SDRAM_PL1|FileName=DDR4_SDRAM.SchDoc|SheetNumber=14|SymbolType=Normal|RawFileName=DDR4_SDRAM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_DDR4_SDRAM_PL2|SchDesignator=U_DDR4_SDRAM_PL2|FileName=DDR4_SDRAM.SchDoc|SheetNumber=14|SymbolType=Normal|RawFileName=DDR4_SDRAM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_DDR4_SDRAM_PS|SchDesignator=U_DDR4_SDRAM_PS|FileName=DDR4_SDRAM.SchDoc|SheetNumber=14|SymbolType=Normal|RawFileName=DDR4_SDRAM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_ETH_PHY_SW_L2L3|SchDesignator=U_ETH_PHY_SW_L2L3|FileName=ETH_PHY_SW_L2L3.SchDoc|SheetNumber=25|SymbolType=Normal|RawFileName=ETH_PHY_SW_L2L3.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_FPGA_7A35T|SchDesignator=U_FPGA_7A35T|FileName=FPGA_7A35T.SchDoc|SheetNumber=15|SymbolType=Normal|RawFileName=FPGA_7A35T.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_FPGA_7A35T_GTP|SchDesignator=U_FPGA_7A35T_GTP|FileName=FPGA_7A35T_GTP.SchDoc|SheetNumber=16|SymbolType=Normal|RawFileName=FPGA_7A35T_GTP.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_FPGA_7A35T_POWER|SchDesignator=U_FPGA_7A35T_POWER|FileName=FPGA_7A35T_POWER.SchDoc|SheetNumber=17|SymbolType=Normal|RawFileName=FPGA_7A35T_POWER.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_FPGA_SDRAM1|SchDesignator=U_FPGA_SDRAM1|FileName=SoC_FPGA_67_68_69_DDR4.SchDoc|SheetNumber=4|SymbolType=Normal|RawFileName=SoC_FPGA_67_68_69_DDR4.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_FPGA_SDRAM2|SchDesignator=U_FPGA_SDRAM2|FileName=SoC_FPGA_64_65_66_DDR4.SchDoc|SheetNumber=3|SymbolType=Normal|RawFileName=SoC_FPGA_64_65_66_DDR4.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_GTY_Transceivers|SchDesignator=U_GTY_Transceivers|FileName=SoC_FPGA_128-131_GTY.SchDoc|SheetNumber=6|SymbolType=Normal|RawFileName=SoC_FPGA_128-131_GTY.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_I2C_MUX|SchDesignator=U_I2C_MUX|FileName=I2C_MUX.SchDoc|SheetNumber=30|SymbolType=Normal|RawFileName=I2C_MUX.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_JTAG_Configuration|SchDesignator=U_JTAG_Configuration|FileName=JTAG_Configuration.SchDoc|SheetNumber=38|SymbolType=Normal|RawFileName=JTAG_Configuration.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_M-LVDS_PHY|SchDesignator=U_M-LVDS_PHY|FileName=MLVDS_Transceivers.SchDoc|SheetNumber=44|SymbolType=Normal|RawFileName=MLVDS_Transceivers.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_Power_Management_RFMC_RTM|SchDesignator=U_Power_Management_RFMC_RTM|FileName=Power_Management_RFMC_RTM.SchDoc|SheetNumber=31|SymbolType=Normal|RawFileName=Power_Management_RFMC_RTM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_PS_DDR|SchDesignator=U_PS_DDR|FileName=SoC_PS_504_DDR4.SchDoc|SheetNumber=10|SymbolType=Normal|RawFileName=SoC_PS_504_DDR4.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_RFMC_ADC|SchDesignator=U_RFMC_ADC|FileName=RFMC_ADC.SchDoc|SheetNumber=18|SymbolType=Normal|RawFileName=RFMC_ADC.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_RFMC_DAC|SchDesignator=U_RFMC_DAC|FileName=RFMC_DAC.SchDoc|SheetNumber=43|SymbolType=Normal|RawFileName=RFMC_DAC.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_RTM_Connector|SchDesignator=U_RTM_Connector|FileName=RTM_Connector.SchDoc|SheetNumber=26|SymbolType=Normal|RawFileName=RTM_Connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_SD_CARD|SchDesignator=U_SD_CARD|FileName=SD_CARD.SchDoc|SheetNumber=32|SymbolType=Normal|RawFileName=SD_CARD.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_SoC_ADC_DAC|SchDesignator=U_SoC_ADC_DAC|FileName=SoC_224-229_ADC_DAC.SchDoc|SheetNumber=7|SymbolType=Normal|RawFileName=SoC_224-229_ADC_DAC.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_SoC_FPGA_Config_0|SchDesignator=U_SoC_FPGA_Config_0|FileName=SoC_FPGA_Config_0.SchDoc|SheetNumber=2|SymbolType=Normal|RawFileName=SoC_FPGA_Config_0.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_SoC_FPGA_HD_84_87|SchDesignator=U_SoC_FPGA_HD_84_87|FileName=SoC_FPGA_HD_84_87.SchDoc|SheetNumber=5|SymbolType=Normal|RawFileName=SoC_FPGA_HD_84_87.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_SoC_PS|SchDesignator=U_SoC_PS|FileName=SoC_PS_500_501_502_MIO.SchDoc|SheetNumber=8|SymbolType=Normal|RawFileName=SoC_PS_500_501_502_MIO.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_SoC_PS_505_GTR|SchDesignator=U_SoC_PS_505_GTR|FileName=SoC_PS_505_GTR.SchDoc|SheetNumber=11|SymbolType=Normal|RawFileName=SoC_PS_505_GTR.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_SoC_PS_Config_503|SchDesignator=U_SoC_PS_Config_503|FileName=SoC_PS_Config_503.SchDoc|SheetNumber=9|SymbolType=Normal|RawFileName=SoC_PS_Config_503.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_SoC_Supply|SchDesignator=U_SoC_Supply|FileName=SoC_Supply.SchDoc|SheetNumber=12|SymbolType=Normal|RawFileName=SoC_Supply.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_SoC_Supply_GND|SchDesignator=U_SoC_Supply_GND|FileName=SoC_Supply_GND.SchDoc|SheetNumber=13|SymbolType=Normal|RawFileName=SoC_Supply_GND.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_Thermometers|SchDesignator=U_Thermometers|FileName=Thermometers.SchDoc|SheetNumber=33|SymbolType=Normal|RawFileName=Thermometers.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_USB3_CON|SchDesignator=U_USB3_CON|FileName=USB3_CON.SchDoc|SheetNumber=36|SymbolType=Normal|RawFileName=USB3_CON.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_USB_PHY|SchDesignator=U_USB_PHY|FileName=USB_PHY.SchDoc|SheetNumber=37|SymbolType=Normal|RawFileName=USB_PHY.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=soc.SchDoc|Designator=U_USB_SERIAL_QUAD|SchDesignator=U_USB_SERIAL_QUAD|FileName=USB_SERIAL_QUAD.SchDoc|SheetNumber=34|SymbolType=Normal|RawFileName=USB_SERIAL_QUAD.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management_RFMC_RTM.SchDoc|Designator=U_ADC_DAC_Supply|SchDesignator=U_ADC_DAC_Supply|FileName=ADC_DAC_Supply.SchDoc|SheetNumber=35|SymbolType=Normal|RawFileName=ADC_DAC_Supply.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management_RFMC_RTM.SchDoc|Designator=U_Supply|SchDesignator=U_Supply|FileName=Supply.SchDoc|SheetNumber=21|SymbolType=Normal|RawFileName=Supply.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management_RFMC_RTM.SchDoc|Designator=U_Supply_CORE|SchDesignator=U_Supply_CORE|FileName=Supply_CORE.SchDoc|SheetNumber=23|SymbolType=Normal|RawFileName=Supply_CORE.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management_RFMC_RTM.SchDoc|Designator=U_Supply_LDOs|SchDesignator=U_Supply_LDOs|FileName=Supply_LDOs.SchDoc|SheetNumber=22|SymbolType=Normal|RawFileName=Supply_LDOs.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management_RFMC_RTM.SchDoc|Designator=U_VCCINT_IO_BRAM_PS|SchDesignator=U_VCCINT_IO_BRAM_PS|FileName=VCCINT_IO_BRAM_PS.SchDoc|SheetNumber=39|SymbolType=Normal|RawFileName=VCCINT_IO_BRAM_PS.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=