From 06644f580fd9c5c26f2556767c65452cce8e8aec Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Carlos=20L=C3=B3pez?= <carlos.lopez@suse.com>
Date: Wed, 8 Nov 2023 15:06:54 +0100
Subject: [PATCH] serial: add a test for receive FIFO flushing
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Add a test that checks that flushing the receive FIFO results in the
correct behavior, i.e. `in_buffer` is cleared.

Signed-off-by: Carlos López <carlos.lopez@suse.com>
---
 vm-superio/src/serial.rs | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/vm-superio/src/serial.rs b/vm-superio/src/serial.rs
index 7b82e9e..aa8ac36 100644
--- a/vm-superio/src/serial.rs
+++ b/vm-superio/src/serial.rs
@@ -820,6 +820,34 @@ mod tests {
         assert_eq!(serial.writer().as_slice(), &RAW_INPUT_BUF);
     }
 
+    #[test]
+    fn test_serial_rx_flush() {
+        let intr_evt = EventFd::new(libc::EFD_NONBLOCK).unwrap();
+        let mut serial = Serial::with_events(intr_evt, ExampleSerialEvents::new(), Vec::new());
+
+        // No data yet
+        let mut lsr = serial.read(LSR_OFFSET);
+        assert_eq!(lsr & LSR_DATA_READY_BIT, 0);
+        assert_eq!(serial.fifo_capacity(), FIFO_SIZE);
+
+        // Write some bytes and check data is ready
+        serial.enqueue_raw_bytes(&RAW_INPUT_BUF).unwrap();
+        lsr = serial.read(LSR_OFFSET);
+        assert_eq!(lsr & LSR_DATA_READY_BIT, 1);
+        assert!(serial.fifo_capacity() != FIFO_SIZE);
+
+        // Flush the FIFO
+        serial.write(FCR_OFFSET, FCR_FLUSH_IN_BIT).unwrap();
+
+        // No data again
+        lsr = serial.read(LSR_OFFSET);
+        assert_eq!(lsr & LSR_DATA_READY_BIT, 0);
+        assert_eq!(serial.fifo_capacity(), FIFO_SIZE);
+
+        // An event should have triggered
+        assert_eq!(serial.events.buffer_ready_event.read().unwrap(), 1);
+    }
+
     #[test]
     fn test_serial_raw_input() {
         let intr_evt = EventFd::new(libc::EFD_NONBLOCK).unwrap();