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s390x vector facilities support #130869
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cc @uweigand |
Thanks for putting together this list! I can certainly look into providing proper vector register ABI support. |
I've looked into this a bit, but ran into a problem I'm not sure how to address. The main issue is that on s390x, we use a different ABI depending on whether or not the vector feature is active (i.e. the processor has vector registers). The difference affects only vector types (which I guess would correspond to
The calling convention should be implemented in the In addition, I'm not sure where to handle the vector alignment. This currently seems to be derived solely from the datalayout string, which likely isn't correct even now - the datalayout string gives the alignment for the LLVM vector types, which is always bounded to 8 bytes, but Clang explicitly uses a different alignment for C/C++ level vector types if necessary. |
@uweigand Thanks for the investigation!
Hmm, I thought it is always 8-byte aligned since LLVM 16 (2e7a964).
I think we can implement this by referring to wasm code (1, 2) that determines the ABI depending on the command line option. |
I haven't done much testing yet, but this approach appears to be working: master...taiki-e:rust:s390x-vector-abi // no_vector: mvc 8(8,%r2), 8(%r3)
// no_vector-NEXT: mvc 0(8,%r2), 0(%r3)
// no_vector-NEXT: br %r14
// vector: vl %v24, 0(%r2), 3
// vector-NEXT: br %r14
#[no_mangle]
extern "C" fn vector(x: &i8x16) -> i8x16 {
*x
} |
The point is that there's a difference between the LLVM IR vector types and the C/C++ language vector types. The LLVM IR vector types are indeed always 8-byte aligned now. But the C/C++ language vector types still use different ABI alignment rules depending on the vector feature. Clang handles this by mapping the C/C++ type not directly to an LLVM IR type (leaving LLVM to use its own alignment rules), but rather to an LLVM IR type with an explicit alignment override (which implements the appropriate ABI alignment rule).
Ah, interesting! It seems this
calls back into the LLVM back-end, which does already know which features are available by default depending on the target-cpu setting. I wasn't aware of that ... I'm wondering whether/how this works when using another codegen backend like GCC or Cranelift? Otherwise, your patch looks good to me, except for
|
Ah, thanks for the clarification.
EDIT: I think #130869 (comment) 's approach will work.
rustc_codegen_gcc seems to have code to handle IIRC rustc_codegen_cranelift does not currently support the target feature at all (rust-lang/rustc_codegen_cranelift#1400), so I suspect that vector ABI cannot be enabled from any way.
It looks like the vector_small case is processed in the branch before processing the 128-bit vector. rust/compiler/rustc_target/src/abi/call/s390x.rs Lines 35 to 38 in a805e3e
However, I think we should handle it explicitly in the
Thanks for pointing that out. I tried to fix this, but it appears that the ABI of Wrapper<Vector> is considered Vector, even without |
Rust plans to disallow passing vector types to non-Rust ABI if the required target feature is disabled (#127731), so I think the issue of ABI differences with C/C++ when |
Hmm. Your test case uses the default (Rust) representation for the Wrapper type - my understanding is that this does not actually guarantee interoperability with the native platform ABI. Only
That looks like a reasonable approach to me as well. |
Oh, you are right. Changing Wrapper to |
This tracks the status of s390x vector facilities support in rustc and standard libraries.
rust/compiler/rustc_target/src/abi/call/s390x.rs
Lines 1 to 2 in 58420a0
rust/compiler/rustc_target/src/spec/targets/s390x_unknown_linux_gnu.rs
Lines 9 to 11 in 58420a0
cfg(target_feature = "vector")
and unstabletarget_feature(enable = "vector")
(underfeature(s390x_target_feature)
): done in rustc_target: add known safe s390x target features #127506target_feature = "vector"
(and other vector-related target features if available)At least blocked until ABI support done, and may be more things are needed given the precedent of postponed stabilization of vector features in RISC-V.
feature(asm_experimental_arch)
on s390x: pending in Stabilize s390x inline assembly #131258#[repr(simd)]
types in input/output of asm (i.e., fully support vector registers): pending in Support #[repr(simd)] types in input/output of s390x inline assembly #131664Both LLVM and GCC do not document
v
constraint, but actually seem to be supported.Probably blocked until ABI support done.
Probably blocked until ABI support done.
is_s390x_feature_detected!("vector")
:@rustbot label +O-SystemZ
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