diff --git a/rtic-monotonics/CHANGELOG.md b/rtic-monotonics/CHANGELOG.md index 3000f889b008..829e15b471dc 100644 --- a/rtic-monotonics/CHANGELOG.md +++ b/rtic-monotonics/CHANGELOG.md @@ -7,6 +7,10 @@ For each category, *Added*, *Changed*, *Fixed* add new entries at the top! ## Unreleased +### Fixed + + - Fix logic errors in `stm32.rs` + ## v2.0.1 - 2024-06-02 ### Changed diff --git a/rtic-monotonics/src/stm32.rs b/rtic-monotonics/src/stm32.rs index 6b3e4c97f05e..5ae4f0153271 100644 --- a/rtic-monotonics/src/stm32.rs +++ b/rtic-monotonics/src/stm32.rs @@ -240,8 +240,8 @@ macro_rules! make_timer { $timer.dier().modify(|r| r.set_uie(true)); // Configure and enable half-period interrupt - $timer.ccr(2).write(|r| r.set_ccr(($bits::MAX - ($bits::MAX >> 1)).into())); - $timer.dier().modify(|r| r.set_ccie(2, true)); + $timer.ccr(0).write(|r| r.set_ccr(($bits::MAX - ($bits::MAX >> 1)).into())); + $timer.dier().modify(|r| r.set_ccie(0, true)); // Trigger an update event to load the prescaler value to the clock. $timer.egr().write(|r| r.set_ug(true)); @@ -290,25 +290,17 @@ macro_rules! make_timer { 0 }; - $timer.ccr(1).write(|r| r.set_ccr(val.into())); + $timer.ccr(0).write(|r| r.set_ccr(val.into())); } fn clear_compare_flag() { - $timer.sr().modify(|r| r.set_ccif(1, false)); + // Do nothing, because the flags are cleared below in on_interrupt } fn pend_interrupt() { cortex_m::peripheral::NVIC::pend(pac::Interrupt::$timer); } - fn enable_timer() { - $timer.dier().modify(|r| r.set_ccie(1, true)); - } - - fn disable_timer() { - $timer.dier().modify(|r| r.set_ccie(1, false)); - } - fn on_interrupt() { // Full period if $timer.sr().read().uif() { @@ -317,8 +309,8 @@ macro_rules! make_timer { assert!(prev % 2 == 1, "Monotonic must have missed an interrupt!"); } // Half period - if $timer.sr().read().ccif(2) { - $timer.sr().modify(|r| r.set_ccif(2, false)); + if $timer.sr().read().ccif(0) { + $timer.sr().modify(|r| r.set_ccif(0, false)); let prev = $overflow.fetch_add(1, Ordering::Relaxed); assert!(prev % 2 == 0, "Monotonic must have missed an interrupt!"); }