From 3c0288c4133296282686ed68fa5fdfd8d2e015ec Mon Sep 17 00:00:00 2001
From: Dan Smathers <dan.smathers@seagate.com>
Date: Wed, 16 Aug 2023 17:41:52 -0600
Subject: [PATCH] adding test of adding read-only csr mconfigptr

mconfigptr is used by the unified discovery task group https://github.com/riscv/configuration-structure

requires https://github.com/riscv/sail-riscv/pull/293 to pass (sail had not implemented mconfigptr)
requires updated encoding.h
passes sail and spike
---
 .../rv32i_m/privilege/src/mconfigptr.S        | 77 +++++++++++++++++++
 1 file changed, 77 insertions(+)
 create mode 100644 riscv-test-suite/rv32i_m/privilege/src/mconfigptr.S

diff --git a/riscv-test-suite/rv32i_m/privilege/src/mconfigptr.S b/riscv-test-suite/rv32i_m/privilege/src/mconfigptr.S
new file mode 100644
index 000000000..c7ccb57bc
--- /dev/null
+++ b/riscv-test-suite/rv32i_m/privilege/src/mconfigptr.S
@@ -0,0 +1,77 @@
+// -----------
+// Copyright (c) 2020. RISC-V International. All rights reserved.
+// SPDX-License-Identifier: BSD-3-Clause
+// -----------
+//
+// This assembly file tests the mconfigptr CSR read access.
+// 
+
+#include "model_test.h"
+#include "arch_test.h"
+
+RVTEST_ISA("RV32I_Zicsr")
+
+# Test code region
+.section .text.init
+.globl rvtest_entry_point
+rvtest_entry_point:
+RVMODEL_BOOT
+RVTEST_CODE_BEGIN
+
+RVTEST_SIGBASE( a1,signature_a1_m) // a1 will point to signature_a1_m label in the signature region - m-mode
+
+#ifdef TEST_CASE_1
+    RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",mconfigptr)
+
+    # ---------------------------------------------------------------------------------------------
+    csrr  t1, CSR_MCONFIGPTR
+
+    LI(   t0,0x12345678)
+    csrw  CSR_MCONFIGPTR, t0
+
+    sub   t0, t0, t1    
+    csrr  t0, CSR_MCONFIGPTR
+    RVTEST_SIGUPD( a1,t0)
+    
+    RVMODEL_IO_WRITE_STR(x30, "# Test part A - test MCONFIGPTR\n");
+
+    RVMODEL_IO_WRITE_STR(x30, "# Test End\n")
+
+#endif
+
+ # ---------------------------------------------------------------------------------------------
+    # HALT
+
+RVTEST_CODE_END
+RVMODEL_HALT
+
+RVTEST_DATA_BEGIN
+# Input data section.
+    .data
+    .align 4
+RVTEST_DATA_END
+
+# Output data section.
+RVMODEL_DATA_BEGIN
+rvtest_sig_begin:
+signature_a1_m:
+    .fill 32*(XLEN/32),4,0xdeadbeef
+
+sig_begin_canary:
+CANARY;
+
+test_A_res:
+    .fill 2, 4, 0xdeadbeef
+
+mtrap_sigptr:
+  .fill 4, 4, 0xdeadbeef
+
+#ifdef rvtest_gpr_save
+gpr_save:
+  .fill 32*(XLEN/32), 4, 0xdeadbeef
+#endif
+
+sig_end_canary:
+CANARY;
+rvtest_sig_end:
+RVMODEL_DATA_END