Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Is it possible to use this core as an USB-UART bridge? #3

Open
francis2tm opened this issue Jun 12, 2022 · 5 comments
Open

Is it possible to use this core as an USB-UART bridge? #3

francis2tm opened this issue Jun 12, 2022 · 5 comments

Comments

@francis2tm
Copy link

Hello,
Amazing work with this usb core. Is it possible to use it directly as a USB-UART bridge? Like D+ and D- entering the FPGA and (UART) TX & RX leaving via output pins

@smunaut
Copy link
Member

smunaut commented Jun 12, 2022

You need to wire it up to an actual uart core like those in no2misc to convert from the internal 'axi stream like' interface and actual uart tx/rx. It's pretty trivial to do for a fixed speed. If you want to support changing speed (and/or other control signals) you'd have to add support for the appropriate control requests for that. Not very complicated and should be fairly small logic wise too.

If you want help hooking that up, join the 1bitsquared discord server and ping me there in the #fpga channel.

@francis2tm
Copy link
Author

Thanks a lot for the support, I'm going to try for myself first ;)

@francis2tm
Copy link
Author

Hello again!
I'm starting now to work on this USB-UART bridge based on this usb core. Do you think it's possible to generate a DTR and a RTS signals? Essencially I want to use an ECP5 to act like a USB-UART bridge to interface a ESP32 with a computer. It'd be amazing if it'd be possible to flash firmware via the USB-UART bridge to the ESP32 too! And the ESP32 can use DTR and RTS signals to put itself it bootloader mode, like so:
image
Do you think it's possible?
Thanks a lot ;)

@francis2tm francis2tm reopened this Aug 6, 2022
@smunaut
Copy link
Member

smunaut commented Aug 9, 2022

Yes, it's possible, you should be able to easily add a couple of GPIO and process the control request to drive them.

Note that ATM the core has some ice40 specific things in it that will need adapting for ecp5. Nothing major (just IOBs and BRAM) and I actually have in a branch an ecp5 version that you could probably patch in easily, but something to consider.

Any reason to use an ECP5 rather than an ice40 ? If that's the only thing you want to put in there, it seems overkill.

@francis2tm
Copy link
Author

Thanks a lot, I'm using an ECP5 cuz I have a full SoC inside it, unfortunately the ice40 doesn't have resources for everything :|

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Development

No branches or pull requests

2 participants