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Check the cache information CPUID for the VTL2 VMM #574

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cperezvargas opened this issue Dec 20, 2024 · 0 comments
Open

Check the cache information CPUID for the VTL2 VMM #574

cperezvargas opened this issue Dec 20, 2024 · 0 comments
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tdx TDX specific bugs or features

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@cperezvargas
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The glibc bug is caused by unexpected cache information; the kernel can provide a workaround for it, or the glibc can be updated to support it, but we may need to check how to handle the CPUID in good shape on such case.

@cperezvargas cperezvargas added the tdx TDX specific bugs or features label Dec 20, 2024
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