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Tileable routing architecture #1828

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narutozxp opened this issue Sep 10, 2024 · 0 comments
Open

Tileable routing architecture #1828

narutozxp opened this issue Sep 10, 2024 · 0 comments

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@narutozxp
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In your paper, "A Study on Switch Block Patterns for Tileable FPGA Routing Architectures", you show the difference of subset switch blocks between tileable architecture and non-tileable architecture.

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As I all know, the subset switch block only connects the tracks with the same number.
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However, in the non-tileable architecture(Fig. 2 (a)), The top red block on the left is connected to the sixth green block below, not the second green block.

So, could you tell me why the subset switch block is that pattern in OPENFPGA? It puzzles me a lot.

Thanks!

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