diff --git a/openfpga/src/annotation/annotate_rr_graph.cpp b/openfpga/src/annotation/annotate_rr_graph.cpp
index c624dd23c..f07489b8a 100644
--- a/openfpga/src/annotation/annotate_rr_graph.cpp
+++ b/openfpga/src/annotation/annotate_rr_graph.cpp
@@ -399,7 +399,9 @@ static RRGSB build_rr_gsb(const DeviceContext& vpr_device_ctx,
 
   for (size_t side = 0; side < rr_gsb.get_num_sides(); ++side) {
     SideManager side_manager(side);
-    VTR_LOG_DEBUG("RRGSB at (%lu, %lu) has %lu chan nodes, %lu ipin nodes, and %lu opin nodes.\n",
+    VTR_LOG_DEBUG(
+      "RRGSB at (%lu, %lu) has %lu chan nodes, %lu ipin nodes, and %lu opin "
+      "nodes.\n",
             rr_gsb.get_x(), rr_gsb.get_y(),
             rr_gsb.chan_node_size(side_manager.get_side()),
             rr_gsb.ipin_node_size(side_manager.get_side()),
diff --git a/openfpga/src/annotation/write_xml_device_rr_gsb.cpp b/openfpga/src/annotation/write_xml_device_rr_gsb.cpp
index 897d44f00..3a0d56a03 100644
--- a/openfpga/src/annotation/write_xml_device_rr_gsb.cpp
+++ b/openfpga/src/annotation/write_xml_device_rr_gsb.cpp
@@ -62,10 +62,15 @@ static void write_rr_gsb_ipin_connection_to_xml(std::fstream& fp,
                 * But we are pretty sure it is either IN_PORT or OUT_PORT
                 * So we just try and find what is valid
                 */
-                driver_node_index = rr_gsb.get_chan_node_index(chan_side, driver_node);
-                if (-1 != driver_node_index) { break; }
+          driver_node_index =
+            rr_gsb.get_chan_node_index(chan_side, driver_node);
+          if (-1 != driver_node_index) {
+            break;
+          }
             }
-            if (-1 != driver_node_index) { break;}
+        if (-1 != driver_node_index) {
+          break;
+        }
         }
 
       /* We must have a valide node index */