[FIRRTL] InferWidths: error can point at operation not involved in constraint

[youngar]

given

FIRRTL version 4.0.0
circuit Foo:
  public module Foo:
    input clock : Clock
    reg r : UInt, clock
    node n = add(r, UInt(1))
    connect r, add(r, UInt(1))

we get

./test.fir:5:5: error: 'firrtl.reg' op is constrained to be wider than itself
    reg r : UInt, clock
    ^
./test.fir:5:5: note: see current operation: %0 = "firrtl.reg"(%arg0) {annotations = [], name = "r", nameKind = #firrtl<name_kind droppable_name>} : (!firrtl.clock) -> !firrtl.uint
./test.fir:6:14: note: constrained width W >= W+1 here:
    node n = add(r, UInt(1))
             ^
./test.fir:7:5: note: constrained width W >= W+1 here:
    connect r, add(r, UInt(1))
    ^

It is pointing at the wrong instance of add, which I suspect is because CSE runs before width inference.