From 8b7511a9d72f806eaa8a1e4220cf623bd57e01bd Mon Sep 17 00:00:00 2001 From: AneesHl Date: Tue, 19 Mar 2024 18:30:44 +0100 Subject: [PATCH] fixed punctuation, commas, etc --- Cargo.toml | 2 +- benches/savina_pong.rs | 4 +--- src/actions.rs | 6 ++---- src/lib.rs | 2 +- src/ports.rs | 2 +- src/scheduler/assembly_impl.rs | 4 ++-- src/scheduler/context.rs | 4 ++-- src/scheduler/debug.rs | 4 ++-- src/scheduler/dependencies.rs | 12 ++++++------ src/scheduler/events.rs | 2 +- src/scheduler/scheduler_impl.rs | 14 +++++++------- src/triggers.rs | 2 +- src/util/vecmap.rs | 4 ++-- 13 files changed, 29 insertions(+), 33 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index ccaea4c1..5d8fd638 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -31,7 +31,7 @@ dmsort = "1.0.1" default=["vec-id-sets"] # Enable the parallel runtime implementation # TODO make default parallel-runtime=["rayon"] -# Enables 64-bit wide reaction ids on 64 bit architectures. +# Enables 64-bit wide reaction ids on 64-bit architectures. # This may reduce performance, but allows for 2^32 reactor # instances compared to the default of 2^16, which may feel # a bit tight for some applications. diff --git a/benches/savina_pong.rs b/benches/savina_pong.rs index d25bb285..8df4da79 100644 --- a/benches/savina_pong.rs +++ b/benches/savina_pong.rs @@ -39,9 +39,7 @@ The ping/pong game from Savina benchmarks. This can be compared to the C implementation (see results.md). See original at https://github.com/icyphy/lingua-franca/blob/f5868bec199e02f784393f32b594be5df935e2ee/benchmark/C/Savina/PingPong.lf - - - */ +*/ criterion_group!(benches, reactor_main); criterion_main!(benches); diff --git a/src/actions.rs b/src/actions.rs index 16a486bd..4d72fae0 100644 --- a/src/actions.rs +++ b/src/actions.rs @@ -51,8 +51,8 @@ pub(crate) struct Action { _logical: PhantomData, /// Stores values of an action for future scheduled events. - /// We rely strongly on the fact that any value put in there by [Action.schedule_future_value] - /// will be cleaned up after that tag. Otherwise the map will + /// We rely strongly on the fact that any value put therein by [Action.schedule_future_value] + /// will be cleaned up after that tag. Otherwise, the map will /// blow up the heap. map: VecMap, Option>, } @@ -61,8 +61,6 @@ impl Action { /// Record a future value that can be queried at a future logical time. /// Note that we don't check that the given time is in the future. If it's /// in the past, the value will never be reclaimed. - /// - /// #[inline] pub(crate) fn schedule_future_value(&mut self, time: EventTag, value: Option) { match self.map.entry(Reverse(time)) { diff --git a/src/lib.rs b/src/lib.rs index 097bde89..7360bd8a 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -114,7 +114,7 @@ pub mod prelude { }; /// Alias for the unit type, so that it can be written without quotes in LF. - /// Otherwise it needs to be written `{= () =}`. + /// Otherwise, it needs to be written `{= () =}`. /// It is not camel-case as it is actually a primitive type. #[allow(non_camel_case_types)] pub type unit = (); diff --git a/src/ports.rs b/src/ports.rs index 424adc5b..2cc8c207 100644 --- a/src/ports.rs +++ b/src/ports.rs @@ -295,7 +295,7 @@ struct PortCell { /// field of that equiv class is updated to contain B. /// /// Why? - /// When you have bound eg A -> B and *then* bind U -> A, + /// When you have bound e.g. A -> B and *then* bind U -> A, /// then both the equiv class of A and B (the downstream of A) /// need to be updated to point to the equiv class of U /// diff --git a/src/scheduler/assembly_impl.rs b/src/scheduler/assembly_impl.rs index d1e8bae8..a143a5c5 100644 --- a/src/scheduler/assembly_impl.rs +++ b/src/scheduler/assembly_impl.rs @@ -199,7 +199,7 @@ where /// priority edges, as they are taken to be those declared /// in LF by the user. /// The rest do not have priority edges, and their - /// implementation must hence have no observable side-effect. + /// implementation must hence have no observable side effect. fn new_reactions( &mut self, my_id: ReactorId, @@ -490,7 +490,7 @@ impl ComponentCreator<'_, '_, S> { /// we trust the code generator to fail if a port is both on /// the LHS and RHS of a connection. /// -/// This is necessary to be iterate the same bank over distinct +/// This is necessary to be able to iterate the same bank over distinct /// ports or multiports to bind them together. #[macro_export] #[doc(hidden)] diff --git a/src/scheduler/context.rs b/src/scheduler/context.rs index 7ad8d6fc..101d900d 100644 --- a/src/scheduler/context.rs +++ b/src/scheduler/context.rs @@ -278,7 +278,7 @@ impl<'a, 'x> ReactionCtx<'a, 'x> { } /// Sets the value of the given port, if the given value is `Some`. - /// Otherwise the port is not set and no reactions are triggered. + /// Otherwise, the port is not set and no reactions are triggered. /// /// The change is visible at the same logical time, i.e. /// the value propagates immediately. This may hence @@ -724,7 +724,7 @@ pub enum Offset { /// Specify that the trigger will fire at least after /// the provided duration. /// - /// If the duration is zero (eg [Asap](Self::Asap)), it does not + /// If the duration is zero (e.g. [Asap](Self::Asap)), it does not /// mean that the trigger will fire right away. For actions, the /// action's inherent minimum delay must be taken into account, /// and even with a zero minimal delay, a delay of one microstep diff --git a/src/scheduler/debug.rs b/src/scheduler/debug.rs index 22bb042a..7ac6af08 100644 --- a/src/scheduler/debug.rs +++ b/src/scheduler/debug.rs @@ -173,7 +173,7 @@ impl DebugInfoRegistry { // ie, we're the first component of the next reactor. Ok(rid) => (rid.plus(1), 0usize), // Here, rid is the reactor which contains the trigger. - // Eg if you have reactor_bound=[2, 4], + // E.g. if you have reactor_bound=[2, 4], // that corresponds to two reactors [2..2, 2..4]. // If you ask for 2, it will take the branch Ok above. // If you ask for 3, it will fail with Err(0), and reactor_bound[0]==2 @@ -233,7 +233,7 @@ pub(crate) struct ReactorDebugInfo { /// Simple name of the instantiation (last segment of the path) #[allow(unused)] pub inst_name: &'static str, - /// Path to this instantiation, with trailing slash (eg `"/parent/child/"`) + /// Path to this instantiation, with trailing slash (e.g. `"/parent/child/"`) inst_path: String, } diff --git a/src/scheduler/dependencies.rs b/src/scheduler/dependencies.rs index a7dcb3eb..f52b362c 100644 --- a/src/scheduler/dependencies.rs +++ b/src/scheduler/dependencies.rs @@ -569,7 +569,7 @@ impl From for LevelIx { pub struct ExecutableReactions<'x> { /// An ordered list of levels to execute. /// - /// It must by construction be the case that a reaction + /// It must, by construction, be the case that a reaction /// in level `i` has no dependency(1) on reactions in levels `j >= i`. /// This way, the execution of reactions in the same level /// may be parallelized. @@ -593,7 +593,7 @@ impl<'x> ExecutableReactions<'x> { /// Returns an iterator which associates batches of reactions /// with their level. Note that this does not mutate this collection - /// (eg drain it), because that way we can use borrowed Cows + /// (e.g. drain it), because that way we can use borrowed Cows /// and avoid more allocation. pub fn batches(&self) -> impl Iterator)> + '_ { self.levels.iter() @@ -890,9 +890,9 @@ pub mod test { test.graph.triggers_reaction(p0, n2); test.graph.triggers_reaction(p1, n2); - // connect to prev_in + // connect to `prev_in` test.graph.triggers_reaction(prev_in, n1); - // replace prev_in with out + // replace `prev_in` with `out` test.graph.reaction_effects(n2, out); prev_in = out; } @@ -930,9 +930,9 @@ pub mod test { test.graph.triggers_reaction(p01, n2); test.graph.triggers_reaction(p11, n2); - // connect to prev_in + // connect to `prev_in` test.graph.triggers_reaction(prev_in, n1); - // replace prev_in with out + // replace `prev_in` with `out` test.graph.reaction_effects(n2, out); prev_in = out; } diff --git a/src/scheduler/events.rs b/src/scheduler/events.rs index 93dc7349..8e57324a 100644 --- a/src/scheduler/events.rs +++ b/src/scheduler/events.rs @@ -217,7 +217,7 @@ impl<'x> EventQueue<'x> { // - start with a sorted `self.value_list` and a (non-sorted) `new_evts: Vec` // - sort the new events in place (in a Cow maybe). They'll // probably come in already sorted but we can't assume this. - // Use an algorithm that best-cases for sorted data. (eg https://crates.io/crates/dmsort) + // Use an algorithm that best-cases for sorted data. (e.g. https://crates.io/crates/dmsort) // - take the earliest new event and binary search to insert it. // - then do the same thing but only on the remaining (to the right) // portion of `self.value_list`. Basically the routine of an insertion diff --git a/src/scheduler/scheduler_impl.rs b/src/scheduler/scheduler_impl.rs index f667ac54..5d35aeff 100644 --- a/src/scheduler/scheduler_impl.rs +++ b/src/scheduler/scheduler_impl.rs @@ -83,9 +83,9 @@ macro_rules! push_event { /// The runtime scheduler. /// -/// Lifetime parameters: 'x and 't are carried around everywhere, -/// 'x allows us to take references into the dataflow graph, and -/// 't to spawn new scoped threads for physical actions. 'a is more +/// Lifetime parameters: `'x` and `'t` are carried around everywhere, +/// `'x` allows us to take references into the dataflow graph, and +/// `'t` to spawn new scoped threads for physical actions. `'a` is more /// useless but is needed to compile. pub struct SyncScheduler<'x> { /// The latest processed logical time (necessarily behind physical time). @@ -351,8 +351,8 @@ impl<'x> SyncScheduler<'x> { } Err(RecvTimeoutError::Timeout) => { /*great*/ } Err(RecvTimeoutError::Disconnected) => { - // ok, there are no physical actions in the program so it's useless to block on self.rx - // we still need to wait though.. + // ok, there are no physical actions in the program, so it's useless to block on self.rx + // we still need to wait though... if let Some(remaining) = target.checked_duration_since(Instant::now()) { std::thread::sleep(remaining); } @@ -446,7 +446,7 @@ impl<'x> SyncScheduler<'x> { push_event!(self, evt) } - // cleanup tag-specific resources, eg clear port values + // cleanup tag-specific resources, e.g. clear port values let ctx = CleanupCtx { tag }; // TODO measure performance of cleaning up all reactors w/ virtual dispatch like this. // see also efforts in the C runtime to avoid this @@ -497,7 +497,7 @@ mod parallel_rt_impl { unsafe impl Sync for UnsafeSharedPointer {} /// We need a Clone bound to use fold_with, but this clone - /// implementation is not general purpose so I hide it. + /// implementation is not general purpose, so I hide it. struct CloneableCtx<'a, 'x>(ReactionCtx<'a, 'x>); impl Clone for CloneableCtx<'_, '_> { diff --git a/src/triggers.rs b/src/triggers.rs index edf5e312..a4adddfb 100644 --- a/src/triggers.rs +++ b/src/triggers.rs @@ -84,7 +84,7 @@ pub struct TriggerId(TriggerIdImpl); // info. But it also forces us to use inefficient data structures to get a Map, // because ids were not allocated consecutively. We were previously using // hashmaps, now we use IndexVec. -// Also the structure of GlobalId used to set relatively low +// Also, the structure of GlobalId used to set relatively low // ceilings on the number of components and reactions of each // reactor. Previously, we could have max 2^16 (reactions+components) // per reactor. Now we can have 2^16 reactions per reactor, diff --git a/src/util/vecmap.rs b/src/util/vecmap.rs index 916fe11f..3dc10fdc 100644 --- a/src/util/vecmap.rs +++ b/src/util/vecmap.rs @@ -181,8 +181,8 @@ where } /// Attempts to find the given `key`. If found, it returns `Ok` with the index of the key in the - /// underlying `Vec`. Otherwise it returns `Err` with the index where a matching element could be - /// inserted while maintaining sorted order. + /// underlying `Vec`. Otherwise, it returns `Err` with the index where a matching element could + /// be inserted while maintaining sorted order. fn find_k(&self, key: &K) -> Result { let mut size = self.v.len(); let mut left = 0;