You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Once issue #9 is implemented it should be trivial to add existing IP blocks to a program.
Initially we should add blocks for:
Blockram
VGA output
DSP
Each of the components should be implemented such that the user can simply add a new Blockram(..params..) to the code, and then start using it.
Each component should have a full simulation implementation in SME, and the VHDL generator (possibly also the C++ generator) should recognize the blocks and output a configuration similar to the actual component instead of transpiling the simulator contents.
Once issue #9 is implemented it should be trivial to add existing IP blocks to a program.
Initially we should add blocks for:
Each of the components should be implemented such that the user can simply add a
new Blockram(..params..)
to the code, and then start using it.Each component should have a full simulation implementation in SME, and the VHDL generator (possibly also the C++ generator) should recognize the blocks and output a configuration similar to the actual component instead of transpiling the simulator contents.
Want to back this issue? Post a bounty on it! We accept bounties via Bountysource.
The text was updated successfully, but these errors were encountered: