A Qeustion about PCB Stackup and Impedance Control

[njyq2008]

Hi Jan,

In the gerber files folder, you recommended the stackup JLC06161H-7628. However, I've noticed that the layer stackup settings you used are slightly different from those provided by the manufacturer (Fig.1). Also, the line width and clearance of the GCPW on the PCB appear to deviate from the calculated results provided by the manufacturer. I'm curious to know if these minor differences will affect the performance of LibreVNA.

Here is the online impedance calculation tool from JLCPCB for reference: https://tools.jlc.com/jlcTools/index.html#/impedanceCalculatenew

Fig.1. Stackup of JLC06161H-7628 by JLCPCB

Fig.2. Impedance control parameters by JLCPCB

[jankae]

I think when I started the design, JLCPCB didn't have the stackup calculator yet. If I remember correctly, they simply mentioned that 7628 prepreg will be used. The thickness values for 7628 I found across the web differ slightly from the ones mentioned by JLCPCB now.
In the end it doesn't really matter. Yes, the traces on the LibreVNA may not have exactly 50 Ohms impedance but they will be close to it (and that is really all you can ask for on FR4). The transmission losses will be dominated by the loss tangent (not some small variation in the impedance) and reflections on the ports will be dominated by the transition from SMA to CPW and the resistive bridge, mismatch due to small deviations from the optimal trace width is small compared to that.

When I did the last redesign, I focussed on the transition from SMA to CPW in an effort to improve port mismatch. This was partly successful but port match could still be better. Using other (more expensive) connectors and just routing a straight through CPW between two connectors (with the same trace width and clearance as on the LibreVNA) got me 30 dB return loss all the way to 6 GHz. The return loss on the LibreVNA is nowhere close to that which shows that it is not at all limited by the CPW.

I guess I just couldn't be bothered to do some tiny optimizations when other components will shadow any potential benefits.

[njyq2008]

Thank you for the detailed explanation. I'm no expert in RF circuit design and I've learned a lot from your reply. Once again, thank you for your time and expertise.