From 61f715e6e77e65c7ba2cf1ca9257a1da7ed87c4d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fin=20Maa=C3=9F?= Date: Wed, 25 Sep 2024 17:17:53 +0200 Subject: [PATCH] build: efinix: common.py; add `SDRInput` MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit add `SDRInput` for efinix Signed-off-by: Fin Maaß --- litex/build/efinix/common.py | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/litex/build/efinix/common.py b/litex/build/efinix/common.py index 5b8030e022..c88cbca18e 100644 --- a/litex/build/efinix/common.py +++ b/litex/build/efinix/common.py @@ -407,6 +407,34 @@ class EfinixDDROutput: def lower(dr): return EfinixDDROutputImpl(dr.platform, dr.i1, dr.i2, dr.o, dr.clk) +# Efinix SDRInput ---------------------------------------------------------------------------------- + +class EfinixSDRInputImpl(Module): + def __init__(self, platform, i, o, clk): + io_name = platform.get_pin_name(i) + io_pad = platform.get_pin_location(i) + io_prop = platform.get_pin_properties(i) + io_data = platform.add_iface_io(io_name) + self.comb += o.eq(io_data) + block = { + "type" : "GPIO", + "mode" : "INPUT", + "name" : io_name, + "location" : io_pad, + "properties" : io_prop, + "size" : 1, + "in_reg" : "REG", + "in_clk_pin" : clk.name_override, # FIXME. + "in_clk_inv" : 0 + } + platform.toolchain.ifacewriter.blocks.append(block) + platform.toolchain.excluded_ios.append(platform.get_pin(i)) + +class EfinixSDRInput: + @staticmethod + def lower(dr): + return EfinixSDRInputImpl(dr.platform, dr.i, dr.o, dr.clk) + # Efinix DDRInput ---------------------------------------------------------------------------------- class EfinixDDRInputImpl(Module): @@ -447,6 +475,7 @@ def lower(dr): DifferentialOutput : EfinixDifferentialOutput, DifferentialInput : EfinixDifferentialInput, SDROutput : EfinixSDROutput, + SDRInput : EfinixSDRInput, SDRTristate : EfinixSDRTristate, DDROutput : EfinixDDROutput, DDRInput : EfinixDDRInput,