From ed711c4872bcc9c936baddf989dfa5a76034021c Mon Sep 17 00:00:00 2001 From: Russell L Friesenhahn Date: Fri, 11 Aug 2023 15:24:41 -0500 Subject: [PATCH 1/5] Allow env variables to override Makefile variables --- Makefile | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/Makefile b/Makefile index 23c19b465..62332c42b 100644 --- a/Makefile +++ b/Makefile @@ -47,12 +47,12 @@ ifeq ($(PDK),sky130A) ifeq ($(CARAVEL_LITE),1) CARAVEL_NAME := caravel-lite - CARAVEL_REPO := https://github.com/efabless/caravel-lite - CARAVEL_TAG := $(MPW_TAG) + CARAVEL_REPO ?= https://github.com/efabless/caravel-lite + CARAVEL_TAG ?= $(MPW_TAG) else CARAVEL_NAME := caravel - CARAVEL_REPO := https://github.com/efabless/caravel - CARAVEL_TAG := $(MPW_TAG) + CARAVEL_REPO ?= https://github.com/efabless/caravel + CARAVEL_TAG ?= $(MPW_TAG) endif endif @@ -65,12 +65,12 @@ ifeq ($(PDK),sky130B) ifeq ($(CARAVEL_LITE),1) CARAVEL_NAME := caravel-lite - CARAVEL_REPO := https://github.com/efabless/caravel-lite - CARAVEL_TAG := $(MPW_TAG) + CARAVEL_REPO ?= https://github.com/efabless/caravel-lite + CARAVEL_TAG ?= $(MPW_TAG) else CARAVEL_NAME := caravel - CARAVEL_REPO := https://github.com/efabless/caravel - CARAVEL_TAG := $(MPW_TAG) + CARAVEL_REPO ?= https://github.com/efabless/caravel + CARAVEL_TAG ?= $(MPW_TAG) endif endif @@ -79,8 +79,8 @@ ifeq ($(PDK),gf180mcuC) MPW_TAG ?= gfmpw-0b CARAVEL_NAME := caravel - CARAVEL_REPO := https://github.com/efabless/caravel-gf180mcu - CARAVEL_TAG := $(MPW_TAG) + CARAVEL_REPO ?= https://github.com/efabless/caravel-gf180mcu + CARAVEL_TAG ?= $(MPW_TAG) #OPENLANE_TAG=ddfeab57e3e8769ea3d40dda12be0460e09bb6d9 export OPEN_PDKS_COMMIT?=e6f9c8876da77220403014b116761b0b2d79aab4 export OPENLANE_TAG?=2023.02.23 From ebac65ec02c68938a7da8aa1395312081878deef Mon Sep 17 00:00:00 2001 From: Russell L Friesenhahn Date: Fri, 11 Aug 2023 15:25:49 -0500 Subject: [PATCH 2/5] Standardize timing-scripts-repo clone like other repos --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 62332c42b..f554f637a 100644 --- a/Makefile +++ b/Makefile @@ -306,11 +306,11 @@ check_dependencies: export CUP_ROOT=$(shell pwd) export TIMING_ROOT?=$(shell pwd)/dependencies/timing-scripts export PROJECT_ROOT=$(CUP_ROOT) -timing-scripts-repo=https://github.com/efabless/timing-scripts.git +export TIMING_SCRIPTS_REPO?=https://github.com/efabless/timing-scripts.git $(TIMING_ROOT): @mkdir -p $(CUP_ROOT)/dependencies - @git clone $(timing-scripts-repo) $(TIMING_ROOT) + @git clone $(TIMING_SCRIPTS_REPO) $(TIMING_ROOT) .PHONY: setup-timing-scripts setup-timing-scripts: $(TIMING_ROOT) From b7701891979e77922561978c6e7fc3237479463f Mon Sep 17 00:00:00 2001 From: Russell L Friesenhahn Date: Fri, 11 Aug 2023 15:26:52 -0500 Subject: [PATCH 3/5] Parameterize where OpenLane is cloned from to support non-internet access builds --- openlane/Makefile | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/openlane/Makefile b/openlane/Makefile index 87dcbbe82..5b5b03ea5 100644 --- a/openlane/Makefile +++ b/openlane/Makefile @@ -16,6 +16,7 @@ MAKEFLAGS+=--warn-undefined-variables export OPENLANE_RUN_TAG = $(shell date '+%y_%m_%d_%H_%M') +export OPENLANE_REPO ?= https://github.com/The-OpenROAD-Project/OpenLane OPENLANE_TAG ?= 2023.07.19 OPENLANE_IMAGE_NAME ?= efabless/openlane:$(OPENLANE_TAG) designs = $(shell find * -maxdepth 0 -type d) @@ -90,10 +91,10 @@ openlane: check-openlane-env echo "Deleting exisiting $(OPENLANE_ROOT)" && \ rm -rf $(OPENLANE_ROOT) && sleep 2; \ fi - git clone https://github.com/The-OpenROAD-Project/OpenLane -b $(OPENLANE_TAG) --depth=1 $(OPENLANE_ROOT) && \ + git clone $(OPENLANE_REPO) -b $(OPENLANE_TAG) --depth=1 $(OPENLANE_ROOT) && \ cd $(OPENLANE_ROOT) && \ - export OPENLANE_IMAGE_NAME=efabless/openlane:$(OPENLANE_TAG) && \ - export IMAGE_NAME=efabless/openlane:$(OPENLANE_TAG) && \ + export OPENLANE_IMAGE_NAME=$(OPENLANE_IMAGE_NAME) && \ + export IMAGE_NAME=$(OPENLANE_IMAGE_NAME) && \ $(MAKE) pull-openlane .PHONY: check-openlane-env From fe64a7efb6d6e77303e84a44fe813c071fa73652 Mon Sep 17 00:00:00 2001 From: Russell L Friesenhahn Date: Fri, 11 Aug 2023 15:24:59 -0500 Subject: [PATCH 4/5] Fix minor typo --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index f554f637a..33feac453 100644 --- a/Makefile +++ b/Makefile @@ -95,7 +95,7 @@ endif .PHONY: install install: if [ -d "$(CARAVEL_ROOT)" ]; then\ - echo "Deleting exisiting $(CARAVEL_ROOT)" && \ + echo "Deleting existing $(CARAVEL_ROOT)" && \ rm -rf $(CARAVEL_ROOT) && sleep 2;\ fi echo "Installing $(CARAVEL_NAME).." From 26e7b8401aa8d556527d0701767dc9e4c4495d3b Mon Sep 17 00:00:00 2001 From: Russell L Friesenhahn Date: Sat, 12 Aug 2023 09:02:45 -0500 Subject: [PATCH 5/5] Parameterize efabless docker location for self-hosted situations --- Makefile | 22 ++++++++++++---------- openlane/Makefile | 3 ++- 2 files changed, 14 insertions(+), 11 deletions(-) diff --git a/Makefile b/Makefile index 33feac453..0436753e0 100644 --- a/Makefile +++ b/Makefile @@ -39,6 +39,8 @@ export DISABLE_LVS?=0 export ROOTLESS +export EFABLESS_DOCKER_BASE ?= efabless + ifeq ($(PDK),sky130A) SKYWATER_COMMIT=f70d8ca46961ff92719d8870a18a076370b85f6c export OPEN_PDKS_COMMIT?=78b7bc32ddb4b6f14f76883c2e2dc5b5de9d1cbc @@ -104,7 +106,7 @@ install: # Install DV setup .PHONY: simenv simenv: - docker pull efabless/dv:latest + docker pull $(EFABLESS_DOCKER_BASE)/dv:latest .PHONY: setup setup: check_dependencies install check-env install_mcw openlane pdk-with-volare setup-timing-scripts setup-cocotb @@ -138,7 +140,7 @@ docker_run_verify=\ -e CORE_VERILOG_PATH=$(TARGET_PATH)/mgmt_core_wrapper/verilog \ -e CARAVEL_VERILOG_PATH=$(TARGET_PATH)/caravel/verilog \ -e MCW_ROOT=$(MCW_ROOT) \ - efabless/dv:latest \ + $(EFABLESS_DOCKER_BASE)/dv:latest \ sh -c $(verify_command) .PHONY: harden @@ -226,7 +228,7 @@ uninstall: .PHONY: precheck precheck: @git clone --depth=1 --branch $(MPW_TAG) https://github.com/efabless/mpw_precheck.git $(PRECHECK_ROOT) - @docker pull efabless/mpw_precheck:latest + @docker pull $(EFABLESS_DOCKER_BASE)/mpw_precheck:latest .PHONY: run-precheck run-precheck: check-pdk check-precheck @@ -241,7 +243,7 @@ run-precheck: check-pdk check-precheck -e PDK_ROOT=$(PDK_ROOT) \ -e PDKPATH=$(PDKPATH) \ -u $(shell id -u $(USER)):$(shell id -g $(USER)) \ - efabless/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 mpw_precheck.py --input_directory $(INPUT_DIRECTORY) --pdk_path $(PDK_ROOT)/$(PDK) license makefile default documentation consistency gpio_defines xor magic_drc klayout_feol klayout_beol klayout_offgrid klayout_met_min_ca_density klayout_pin_label_purposes_overlapping_drawing klayout_zeroarea"; \ + $(EFABLESS_DOCKER_BASE)/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 mpw_precheck.py --input_directory $(INPUT_DIRECTORY) --pdk_path $(PDK_ROOT)/$(PDK) license makefile default documentation consistency gpio_defines xor magic_drc klayout_feol klayout_beol klayout_offgrid klayout_met_min_ca_density klayout_pin_label_purposes_overlapping_drawing klayout_zeroarea"; \ else \ $(eval INPUT_DIRECTORY := $(shell pwd)) \ cd $(PRECHECK_ROOT) && \ @@ -253,7 +255,7 @@ run-precheck: check-pdk check-precheck -e PDK_ROOT=$(PDK_ROOT) \ -e PDKPATH=$(PDKPATH) \ -u $(shell id -u $(USER)):$(shell id -g $(USER)) \ - efabless/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 mpw_precheck.py --input_directory $(INPUT_DIRECTORY) --pdk_path $(PDK_ROOT)/$(PDK)"; \ + $(EFABLESS_DOCKER_BASE)/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 mpw_precheck.py --input_directory $(INPUT_DIRECTORY) --pdk_path $(PDK_ROOT)/$(PDK)"; \ fi @@ -266,7 +268,7 @@ $(LVS_BLOCKS): lvs-% : ./lvs/%/lvs_config.json check-pdk check-precheck -v $(INPUT_DIRECTORY):$(INPUT_DIRECTORY) \ -v $(PDK_ROOT):$(PDK_ROOT) \ -u $(shell id -u $(USER)):$(shell id -g $(USER)) \ - efabless/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 checks/lvs_check/lvs.py --pdk_path $(PDK_ROOT)/$(PDK) --design_directory $(INPUT_DIRECTORY) --output_directory $(INPUT_DIRECTORY)/lvs --design_name $* --config_file $(INPUT_DIRECTORY)/lvs/$*/lvs_config.json" + $(EFABLESS_DOCKER_BASE)/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 checks/lvs_check/lvs.py --pdk_path $(PDK_ROOT)/$(PDK) --design_directory $(INPUT_DIRECTORY) --output_directory $(INPUT_DIRECTORY)/lvs --design_name $* --config_file $(INPUT_DIRECTORY)/lvs/$*/lvs_config.json" .PHONY: clean clean: @@ -321,8 +323,8 @@ setup-timing-scripts: $(TIMING_ROOT) setup-cocotb: @pip install caravel-cocotb==1.0.0 @(python3 $(PROJECT_ROOT)/verilog/dv/setup-cocotb.py $(CARAVEL_ROOT) $(MCW_ROOT) $(PDK_ROOT) $(PDK) $(PROJECT_ROOT)) - @docker pull efabless/dv:latest - @docker pull efabless/dv:cocotb + @docker pull $(EFABLESS_DOCKER_BASE)/dv:latest + @docker pull $(EFABLESS_DOCKER_BASE)/dv:cocotb .PHONY: cocotb-verify-rtl cocotb-verify-rtl: @@ -352,7 +354,7 @@ create-spef-mapping: ./verilog/gl/user_project_wrapper.v -v $(MCW_ROOT):$(MCW_ROOT) \ -v $(TIMING_ROOT):$(TIMING_ROOT) \ -w $(shell pwd) \ - efabless/timing-scripts:latest \ + $(EFABLESS_DOCKER_BASE)/timing-scripts:latest \ python3 $(TIMING_ROOT)/scripts/generate_spef_mapping.py \ -i ./verilog/gl/user_project_wrapper.v \ -o ./env/spef-mapping.tcl \ @@ -372,7 +374,7 @@ extract-parasitics: ./verilog/gl/user_project_wrapper.v -v $(MCW_ROOT):$(MCW_ROOT) \ -v $(TIMING_ROOT):$(TIMING_ROOT) \ -w $(shell pwd) \ - efabless/timing-scripts:latest \ + $(EFABLESS_DOCKER_BASE)/timing-scripts:latest \ python3 $(TIMING_ROOT)/scripts/get_macros.py \ -i ./verilog/gl/user_project_wrapper.v \ -o ./tmp-macros-list \ diff --git a/openlane/Makefile b/openlane/Makefile index 5b5b03ea5..854bceacd 100644 --- a/openlane/Makefile +++ b/openlane/Makefile @@ -18,7 +18,8 @@ MAKEFLAGS+=--warn-undefined-variables export OPENLANE_RUN_TAG = $(shell date '+%y_%m_%d_%H_%M') export OPENLANE_REPO ?= https://github.com/The-OpenROAD-Project/OpenLane OPENLANE_TAG ?= 2023.07.19 -OPENLANE_IMAGE_NAME ?= efabless/openlane:$(OPENLANE_TAG) +EFABLESS_DOCKER_BASE ?= efabless +OPENLANE_IMAGE_NAME ?= $(EFABLESS_DOCKER_BASE)/openlane:$(OPENLANE_TAG) designs = $(shell find * -maxdepth 0 -type d) current_design = null