Call for Skidl Framework or More Design Details to Contribute to Issues#188

[YeJX0108]

I am working on #188 , need more design detail about this lib..Pleeeeeeeease!

[devbisme]

I'll provide some guidance, but you'll probably have to ask follow-up questions to guide me toward what details you need.

First of all, make your changes using the development branch! (The master branch contains older code for the version of SKiDL released on PyPI. It will get replaced with the code in the development branch when a new version is released.)

Next, the code for placing and routing a schematic is in the src/skidl/schematics directory. This is generic code and is used no matter what version of KiCad is selected as the backend tool. You shouldn't have to change anything in this directory to support a new version of KiCad.

To support KiCad 6, 7 or 8, you would need to make your modifications in the src/skidl/tools/kicad[6,7,8] directory.
These directories are nearly identical, so you can work on any of them and then we can port the code to the other versions with (probably) minor changes.

The two files most related to schematic generation are:

• bboxes.py: Contains functions for finding the bounding boxes of part symbols and hierarchical labels for use during placement.
• gen_schematic.py.: Contains functions for preprocessing the SKiDL circuit and passing it to the generic place-and-route function and then converting the results into an EESCHEMA file.

The existing code in the [kicad[6,7,8] directories is mostly taken from the kicad5 directory with a few modifications and a sprinkling of NotImplementedError exceptions. One way of working on this is to run the code on an example and see where it bombs. Then work from there.

Take a look through the code and feel free to aks questions.

[YeJX0108]

Whether kicad v5, v6 and v7 have different schmetic file format? If so, I need to modify gen_schematic.py file?

[devbisme]

Yes. At the bottom of that file, you'll see the gen_schematic() function that orchestrates the creation of the schematic as follows:

1. The preprocess_circuit() function generates a Node object that stores the circuit in a form that the place-and-route function can understand. This involves calculating the bounding box for each part and the positions of the I/O pins where connections are made.
2. Then the place-and-route runs and updates the Node object with the placed positions of the parts and the routed wiring for each hierarchical level of the circuit.
3. Then the node_to_eeschema() function uses the part positions and wire segment end-points to generate the schematic as EESCHEMA files for the particular version of KiCad.

Hopefully, KiCad 6, 7, and 8 are sufficiently close that we only need to do this once or with minor modifications.

[YeJX0108]

A question about schematic file format. I am modifying some functions in gen_schematic.py (bbox_to_eeschema(bbox, tx, name=None),net_to_eeschema(self, tx),part_to_eeschema(part, tx)......) to deal the problem of different schematic formats. My idea is just to rewrite those functions according to v7 schematic file format, but I think this modification is not enough, Whether I need to do something else when I only focusing on the problem of file format?

[devbisme]

You should concentrate on the *_to_eeschema() functions in gen_schematic.py. You'll also need to modify create_eeschema_file(). Then you can try some simple examples, see what happens, and then fix errors and iterate.

You may have to modify parse_lib_part() in lib.py to have it set the x and y positions of each pin in the part, but I think I already did that in the parse_pins() function. This is necessary so the router knows where to attach signal nets.

[devbisme]

I forgot to mention that you'll also need to modify the bboxes.py file to calculate bounding boxes (used by the placer for arranging parts so they don't overlap). It looks like I already did some of that work but avoided some things involving text objects.