diff --git a/kernel/arch/i386/flush.s b/kernel/arch/i386/flush.s index a215bd98..2f1f7f3f 100644 --- a/kernel/arch/i386/flush.s +++ b/kernel/arch/i386/flush.s @@ -33,7 +33,7 @@ gdt_flush: # Allows our code to call tss_flush(). .global tss_flush tss_flush: - mov $0x2B, %ax # Load the index of our TSS structure - The index is + mov $0x4B, %ax # Load the index of our TSS structure - The index is # 0x28, as it is the 5th selector and each is 8 bytes # long, but we set the bottom two bits (making 0x2B) # so that it has an RPL of 3, not zero. diff --git a/kernel/arch/i386/gdt.cpp b/kernel/arch/i386/gdt.cpp index fcd86208..f95f1457 100644 --- a/kernel/arch/i386/gdt.cpp +++ b/kernel/arch/i386/gdt.cpp @@ -15,7 +15,7 @@ #include #include -#define GDT_NUM_ENTRIES 6 +#define GDT_NUM_ENTRIES 10 // Defined in the gdt_flush.s file. extern "C" void gdt_flush(uintptr_t); @@ -84,9 +84,13 @@ void gdt_install() { gdt_set_gate(0, 0, 0, 0); // Null segment gdt_set_gate(1, 0, 0x000FFFFF, GDT_CODE_PL0); // Kernel code segment gdt_set_gate(2, 0, 0x000FFFFF, GDT_DATA_PL0); // Kernel data segment - gdt_set_gate(3, 0, 0x000FFFFF, GDT_CODE_PL3); // User mode code segment - gdt_set_gate(4, 0, 0x000FFFFF, GDT_DATA_PL3); // User mode data segment - tss_set_gate(5, 0x10, 0x0); // TSS entry + gdt_set_gate(3, 0, 0x000FFFFF, GDT_CODE_PL1); // Reserved code segment + gdt_set_gate(4, 0, 0x000FFFFF, GDT_DATA_PL1); // Reserved data segment + gdt_set_gate(5, 0, 0x000FFFFF, GDT_CODE_PL2); // Driver code segment + gdt_set_gate(6, 0, 0x000FFFFF, GDT_DATA_PL2); // Driver data segment + gdt_set_gate(7, 0, 0x000FFFFF, GDT_CODE_PL3); // User mode code segment + gdt_set_gate(8, 0, 0x000FFFFF, GDT_DATA_PL3); // User mode data segment + tss_set_gate(9, 0x10, 0x0); // TSS entry gdt_flush((uint32_t)&gdt_ptr); tss_flush(); diff --git a/sysroot/usr/include/kernel/arch/i386/gdt.hpp b/sysroot/usr/include/kernel/arch/i386/gdt.hpp index 03963efc..aa6da651 100644 --- a/sysroot/usr/include/kernel/arch/i386/gdt.hpp +++ b/sysroot/usr/include/kernel/arch/i386/gdt.hpp @@ -44,6 +44,7 @@ #define SEG_CODE_EXRDC 0x0E // Execute/Read, conforming #define SEG_CODE_EXRDCA 0x0F // Execute/Read, conforming, accessed +// Ring 0 Privilege Levels (Kernel) #define GDT_CODE_PL0 SEG_TYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \ SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \ SEG_PRIV(0) | SEG_CODE_EXRD @@ -52,6 +53,25 @@ SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \ SEG_PRIV(0) | SEG_DATA_RDWR +// Ring 1 Privilege Levels (Reserved) +#define GDT_CODE_PL1 SEG_TYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \ + SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \ + SEG_PRIV(1) | SEG_CODE_EXRD + +#define GDT_DATA_PL1 SEG_TYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \ + SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \ + SEG_PRIV(1) | SEG_DATA_RDWR + +// Ring 2 Privilege Levels (Reserved for drivers) +#define GDT_CODE_PL2 SEG_TYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \ + SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \ + SEG_PRIV(2) | SEG_CODE_EXRD + +#define GDT_DATA_PL2 SEG_TYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \ + SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \ + SEG_PRIV(2) | SEG_DATA_RDWR + +// Ring 3 Privilege Levels (Userspace) #define GDT_CODE_PL3 SEG_TYPE(1) | SEG_PRES(1) | SEG_SAVL(0) | \ SEG_LONG(0) | SEG_SIZE(1) | SEG_GRAN(1) | \ SEG_PRIV(3) | SEG_CODE_EXRD