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Theory of operation photos #14
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It looks like some images are missing from the doc folder which I tried to tidy up. Also, some schematic files are missing, although, I can see images generated off those. |
Hi guys! Thanks for contributing, I really appreciate it! When I uploaded much of this project it was after I had a hard drive crash and my backups failed, so I'm in the process of trying to recover that data. So far none of the data recovery tools I've tried have worked. I'm trying to find a donor drive so I can do a board or platter swap. Worst case scenario, once I get QEDA working it should be should be trivial to design new gates. With that said, the controlled X and controlled Y gates are basically mirrored versions of one another; the controlled Z gate should be just two NS(-1) gates, and the controlled hadamard, that I have no idea off the top of my head at the moment, I'll see if I can't find the designs in my paperwork this weekend |
@NoahGWood sorry for polluting into this thread:
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@crtag Oh, you're fine dude So, we have the physical processor designed, what we need now is a way to program the processor, and that requires designing the instruction set architecture. The hardware informs the ISA, so we need to go through and map out the control signals and figure out what commands to include and how to perform those. I'm making a spreadsheet which will collate all that information which I'll upload to the github shortly. Ben Eater has a great tutorial on how to do this, so if anyone wants to jump in and help design the instruction set but doesn't know how, you can learn how to do that here: https://www.youtube.com/watch?v=dXdoim96v5A To answer your other question, Github recently came out with a new feature I've just enabled called Discussions, I think that would be a great place for communicating generic questions, ideas, etc. I really appreciate all your guys' help, so if you have any comments or suggestions, definitely head over to the discussions and leave some feedback |
@NoahGWood sounds good. I will wait for updates, just need a bit of direction to start with and fill some gaps in QPU schematics, will take care of documentation once it will get clearer - I guess there're lots of things in your head and somewhere on your hard drives that could help to understand what's been designed so far. Also, happy to jump on ISA scaffolding - been a while since I touched an assembler code. |
Alright, the CZ gate optical topology can now be found in the UniversalGateSet I'm also working on a 3D printable test fixture to make it a bit easier to assemble/align the optics |
Describe the bug
Many of the photos in QCore.md ->theory of operation are broken. They are:
Qbit modes
CY gate
CZ gate
CH gate
To Reproduce
Just open it.
Expected behavior
I expected photos to show up, but I click on the links and get a 404
Desktop (please complete the following information):
The text was updated successfully, but these errors were encountered: