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VexRiscv for custom processing in memory instructions #420

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neha2351 opened this issue Aug 7, 2024 · 2 comments
Open

VexRiscv for custom processing in memory instructions #420

neha2351 opened this issue Aug 7, 2024 · 2 comments

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@neha2351
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neha2351 commented Aug 7, 2024

Hi ,

I am planning to customise the VexRiscv core and implement new plugin for processing in memory capabilities using one basic instruction lets say PIM_MEM_CPY which will copy the contents from the memory and paste it in the memory itself. Can this be done in a RISC way on this core?

Thanks

@neha2351
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neha2351 commented Aug 9, 2024

I plan to have a co-processor (PIM processor) in/near the memory for memory-intensive tasks. So the main task for this custom instruction will be to establish a communication between the CPU and the PIM processor to divide the memory-intensive tasks and establish a handshake. Any suggestions / relevant resources will be useful.

@Dolu1990
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the CfuPlugin is kinda similar, probably a good one to look at as it fork/join instruction to streams

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