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Really sorry to ask but my knowledge is really limited.
I am now working on NetFPGA-1G-CML-live/projects/reference_switch_nf1_cml.
I have a few questions.
First is that where can I find the TOP module of this design?
By Looking to NetFPGA-1G-CML-live/projects/reference_switch_nf1_cml/hw/nf1_cml/system_axisim_tb.v
I find name of the TOP module seems to be system_axisim(or system as I have found in another file).
However by searching the files I cannot find a module called "system_axisim".
So, where can I find it? Or by some make commands, I can build them find them in specific folders?
Besides, I follow the steps and get a bitfile. I cannot see much information related to it.
what if I want to know how many recourses the design occupies on the FPGA?(like how many LUTs)
Furthermore, is it possible to turn the project into a Vivado project?(I mean only relying on Vivado, getting rid of ISE?) By using scripts, I can only build the project in Linux with limited version.
If I can use only vivado, it can be built in more kinds of OS.
Thank you very much. Looking forward to your reply.
The text was updated successfully, but these errors were encountered:
Oh, another question.
If I want to modify some parts of the design, what should I do?
For example, I want to modify the output port lookup. Should I modify this file?
NetFPGA-1G-CML-live/lib/hw/std/pcores/nf10_switch_output_port_lookup_v1_10_a
And how can I make sure that the bitfile is re-generated?
(Sorry again for my limited knowledge)
Really sorry to ask but my knowledge is really limited.
I am now working on NetFPGA-1G-CML-live/projects/reference_switch_nf1_cml.
I have a few questions.
First is that where can I find the TOP module of this design?
By Looking to NetFPGA-1G-CML-live/projects/reference_switch_nf1_cml/hw/nf1_cml/system_axisim_tb.v
I find name of the TOP module seems to be system_axisim(or system as I have found in another file).
However by searching the files I cannot find a module called "system_axisim".
So, where can I find it? Or by some make commands, I can build them find them in specific folders?
Besides, I follow the steps and get a bitfile. I cannot see much information related to it.
what if I want to know how many recourses the design occupies on the FPGA?(like how many LUTs)
Furthermore, is it possible to turn the project into a Vivado project?(I mean only relying on Vivado, getting rid of ISE?) By using scripts, I can only build the project in Linux with limited version.
If I can use only vivado, it can be built in more kinds of OS.
Thank you very much. Looking forward to your reply.
The text was updated successfully, but these errors were encountered: