OOB trap is fatal for CPU back-ends

[maleadt]

julia> using OpenCL, pocl_jll

julia> function kernel(x)
       x[1]
       return
       end
kernel (generic function with 1 method)

julia> @opencl kernel(CLArray{Int}(undef, 0))
ERROR: Out-of-bounds array access.

[8653] signal (4.1): Illegal instruction: 4

[maleadt]

Problem is that SPIR-V only has OpUnreachable, and no equivalent for exit from PTX. And signal_exception already does nothing right now (which is something that ought to be fixed in its own regard); the trap comes from Julia, and is relatively hard to avoid without rewriting the IR right before SPIR-V generation. And even then there's no guarantee that the back-end's LLVM won't reconstruct the unreachable and insert a trap again...

[VarLad]

Apologies for adding noise. Another way to run on CPU as backend (on Linux) would be:

RUSTICL_ENABLE=llvmpipe RUSTICL_DEVICE_TYPE=gpu julia

which interestingly gives a different error:

julia> @opencl kernel(CLArray{Int}(undef, 0))
ERROR: Out-of-bounds array access.
OpenCL.HostKernel{typeof(kernel), Tuple{CLDeviceVector{Int64, 1}}}(kernel, OpenCL.Kernel("_Z6kernel13CLDeviceArrayI5Int64Ll1ELl1EE" nargs=1))

This error is same if I run it with NVIDIA/AMD GPUs as well.
Not sure if its of any relevance, just thought it'd be cool to share :)

[maleadt]

Definitely interesting, as it means that rusticl lowers trap differently than pocl does. May be worth opening an issue about.

EDIT: opened an issue, pocl/pocl#1619

[maleadt]

@VarLad Could you check whether the kernel actually exits after encountering an exception, i.e., if no code after it gets executed? And/or, if possible, post the generated native code for the kernel.