Source codes for High Level Synthesis for Fixed Progammable Gate Arrays (FPGAs). Can be converted to RTL using Vivado HLS or SDSoC.
- Finding the histogram of an image
- Histogram stretching
- Histogram equalization
- Anisotropic diffusion (optimized for hardware)
- Simple 2D convolution using an inbuilt HLS function
- Simple 2D convolution using handwritten code