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Time behaves funny #55
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Looks like it's caused by b79c3d9. |
trasz
referenced
this issue
Oct 10, 2017
The MIPS Count register is incremented every 2 cycles, not every cycle (according to sys/mips/include/clock.h). Also, instead of using muldiv64() to convert from ticks to nanoseconds: y = muldiv64(x, get_ticks_per_sec(), TIMER_FREQ) where y = number of system ticks and x = device ticks we can just do: y = x * 10ns (for 100Mhz clock)
A plausible explanation (proposed by Alex) is that the Qemu timer interrupt fires from the host's virtual timer, and thus its frequency depends on how much host CPU time the qemu process is using at the moment. At the same time the Counter CP0 register is updated from the host's monotonic clock (a wallclock), so the guest time keeps being updated correctly. |
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Sometimes - I'm not sure what it depends on, it kind of seems to occur on a freshly booted system, I can observe this:
At the same time in another terminal:
Also this, there was about 10 seconds between invocations; observe how clock0 has rate 566, but the actual value doesn't change at all:
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