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Description the bug/issue
The error means that the compiler is trying to use a variable that has not been declared yet. We must make sure that the variable is declared before it is used.
To Reproduce
code to reproduce the error
moduletop;wirecond;wire[3:0]xx0,xx1,xx2;wire[2:0]yy0,yy1,yy2;//Acoupleofobviousplaceswherewewanttowarn:
wire[3:0]and_warn1=xx0 & 32;//warnsince32istoobigtofitinto4bitswire[3:0]and_warn2=xx0 & yy0;//warnsincethewiresaredifferentsizes//Warningsaboutthesizeofazeroareespeciallyirritating:
wire[3:0]and_normal1=xx0 & 0;//do not warnbecausethisiscommon//Warningsaboutextensionintegersaren't ok since the whole point is that // they're"supposed to grow"wire[3:0]and_normal2=xx0 & '0; wire [3:0] and_normal3 = xx0 & '1;//Sometrickycases.
// Zeroisreallyspecial.Ifwehavethewrongsizeofazero,that//stilldoesn't seem worth bothering people about. wire [3:0] and_normal4 = xx0 & 2'b0;//Forothernumbers,it's less clear what we should do. Something // like xx0 & 2'b11isespeciallyconcerningbecausewhatif2'b11 // is supposed to be a mask and the designer thinks he'sgettingthe//wholesignalmaskedout,butforgetsthatheaddedabittoxx0//andit's three bits now instead of 2. // // Because of this sort of thing, I think it *does* make sense to issue // fussy warnings about bitwise stuff being applied to nonzero integers // that are too small. wire [3:0] and_warn3 = xx0 & 2'b11;wire[3:0]and_warn4=xx0 & 2'b10; wire [3:0] and_warn5 = xx0 & 2'b01;//Whencompoundexpressionsinvolveplainintegers,thingsgetmore//interesting.Theheuristicsforfiguringoutwhenwedoanddon't want to // warn are a bit tricky. wire [3:0] andc_normal1 = xx0 & (cond ? xx1 : xx2); wire [3:0] andc_normal2 = xx0 & (cond ? xx1 : '0);wire[3:0]andc_normal3=xx0 & (cond ? xx1 : '1); wire [3:0] andc_warn1 = xx0 & (2'b0 & 2'b1); wire [3:0] andc_warn2 = xx0 & (xx1[1:0] & 2'b11);wire[3:0]andc_warn3=xx0 & (cond ? xx1 : 16);//Properwarningbecause16doesn't fit wire [3:0] andc_warn4 = xx0 & (cond ? xx1 : 32); // Proper warning because 32 doesn'tfit.wire[3:0]andc_minor1=xx0 & (cond ? xx1 : 0);//Minorbecauseitfitswire[3:0]andc_minor2=xx0 & (cond ? xx1 : 15);//Minorbecauseitfitswirelt_normal1=xx0 < xx1;wirelt_normal2=xx0 < 5;wirelt_normal3='0 < xx0; // This should be a warning because 32 doesn'tfit.wirelt_warn1=xx0 < 32;//I'm not sure whether we should really issue a warning here. The wires are // of different sizes, but that's not entirelyunreasonable.Well,Iguess//let's warn for now and see if it is too chatty to stand. wire lt_warn2 = xx0 < yy0; // These should be minor because they fit. wire ltc_minor1 = xx0 < (cond ? xx1 : 0); wire ltc_minor2 = xx0 < (cond ? xx1 : 5); wire eq_normal1 = xx0 == xx1; wire eq_normal2 = xx0 == 5; wire eq_normal3 = '0 == xx0;//Thisshouldbeawarningbecause32doesn't fit. wire eq_warn1 = xx0 == 32; // I'm not surewhetherweshouldreallyissueawarninghere.Thewiresare//ofdifferentsizes,butthat's not entirely unreasonable. Well, I guess // let'swarnfornowandseeifitistoochattytostand.wireeq_warn2=xx0 == yy0;//Theseshouldbeminorbecausetheyfit.wireeqc_minor1=xx0 == (cond ? xx1 : 0);wireeqc_minor2=xx0 == (cond ? xx1 : 5);wirecond_normal1=cond ? xx1 : xx2;wirecond_normal2=cond ? xx1 : 0;wirecond_normal3=cond ? xx1 : '0; wire cond_normal4 = cond ? xx1 : '1;wirecond_warn1=cond ? xx1 : yy1;wirecond_warn2=cond ? xx0 : 16;//16doesn't fit wire cond_warn3 = cond ? (xx0 & xx1) : (yy0 & yy1); //@VL LINT_IGNORE wire [3:0] supp_normal1 = xx0 & yy0; //@VL LINT_IGNORE_FUSSY_SIZE_WARNING wire [3:0] supp_normal2 = xx0 & yy0; //@VL LINT_IGNORE_FUSSY wire [3:0] supp_normal3 = xx0 & yy0; // A right shift followed by an AND seems like a reasonable thing to do. We won't//warnaboutanyofthese.wireshift_mask_normal1=(xx0 >> 2) & 1'b1; wire shift_mask_normal2 = (xx0 >> 2) & 2'b1;wireshift_mask_normal3=(xx0 >> 2) & yy0[1:0];wireshift_mask_normal4=(xx0 >> 2) & yy0[0];//Forshiftscombinedwithotheroperatorsbesidesand(formasking),we//willcheckforamorestrictagreementwireshift_xor_warn1=(xx0 >> 2) ^ 1'b1; // warn because the "intuitive size" of (xx >> 2) is 2 wire shift_xor_warn2 = (xx0 >> 2) ^ yy0[0]; wire shift_xor_normal1 = (xx0 >> 2) ^ 2'b1;//don't warn because the "intuitive size" matches wire shift_xor_normal2 = (xx0 >> 2) ^ yy0[1:0];endmodulemodule a0; // [Jared] this file isn'ttherightplacetotestthis,butpreviouslywe//failedtoparsetheseexpressions,soI'd like to keep them somewhere to // make sure the fix works. wire rand1 = $random % 2; wire rand2 = $urandom % 2; wire rand3 = $random() % 2; wire rand4 = $urandom() % 2; wire [3:0] normal_sysfun1 = xx0 & $countones(xx2); wire [2:0] normal_sysfun2 = yy0 & $countones(xx2); wire [3:0] normal_sysfun3 = xx0 == $bits(xx2); wire [2:0] normal_sysfun4 = yy0 == $bits(xx2);endmodulemodule a1 ; parameter foo = 7; wire [3:0] bar; parameter [4:0] baz = 6; wire x0, x1, x2; wire y0, y1, y2; wire z0, z1, z2; assign x0 = foo ? x1 : x2; // don'twarnaboutwide,untypedparameterslikefooassigny0=bar ? y1 : y2;//dowarnaboutwidewireslikebarassignz0=baz ? z1 : z2;//dowarnaboutwide,typedparametersendmodule
Error Log
Error-[IND]Identifier not declareddesign.sv,180Identifier'xx0'has not beendeclaredyet.Ifthiserroris not expected,pleasecheckifyouhaveset`default_nettype to none.Error-[IND] Identifier not declareddesign.sv, 181 Identifier 'yy0' has not been declared yet. If this error is not expected, please check if you have set `default_nettypetonone.Error-[IND]Identifier not declareddesign.sv,182Identifier'xx2'has not beendeclaredyet.Ifthiserroris not expected,pleasecheckifyouhaveset `default_nettypetonone.
The text was updated successfully, but these errors were encountered:
Description the bug/issue
The error means that the compiler is trying to use a variable that has not been declared yet. We must make sure that the variable is declared before it is used.
To Reproduce
code to reproduce the error
Error Log
The text was updated successfully, but these errors were encountered: