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S2LP__Gpio_8h.html
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<li class="navelem"><a class="el" href="dir_d75c23162a2652451dce46d2e7e8aead.html">application</a></li><li class="navelem"><a class="el" href="dir_eeae24ee2ae2430c5086d4802bed50ad.html">rf_data_tx_rx</a></li><li class="navelem"><a class="el" href="dir_457479e51678fc3cc84b7aa4a83c7b21.html">S2LP_Library</a></li><li class="navelem"><a class="el" href="dir_15d760b2ccfe9b21dafdc3de727edde9.html">Inc</a></li> </ul>
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<div class="header">
<div class="summary">
<a href="#nested-classes">Data Structures</a> |
<a href="#enum-members">Enumerations</a> |
<a href="#func-members">Functions</a> </div>
<div class="headertitle">
<div class="title">S2LP_Gpio.h File Reference</div> </div>
</div><!--header-->
<div class="contents">
<p>Configuration and management of S2-LP GPIO.
<a href="#details">More...</a></p>
<div class="textblock"><code>#include "<a class="el" href="S2LP__Regs_8h_source.html">S2LP_Regs.h</a>"</code><br />
<code>#include "<a class="el" href="S2LP__Types_8h_source.html">S2LP_Types.h</a>"</code><br />
</div>
<p><a href="S2LP__Gpio_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structSGpioInit.html">SGpioInit</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">S2LP GPIO Init structure definition. <a href="structSGpioInit.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structClockOutputInit.html">ClockOutputInit</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">S2LP Clock Output initialization structure definition. <a href="structClockOutputInit.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structS2LPIrqs.html">S2LPIrqs</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">IRQ bitfield structure for S2LP. This structure is used to read or write the single IRQ bit. During the initialization the user has to fill this structure setting to one the single field related to the IRQ he wants to enable, and to zero the single field related to all the IRQs he wants to disable. The same structure can be used to retrieve all the IRQ events from the IRQ registers IRQ_STATUS[3:0], and read if one or more specific IRQ raised. <a href="structS2LPIrqs.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:ga7df105f2d110525f5323d56216255c32"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Types.html#ga7df105f2d110525f5323d56216255c32">S2LPGpioPin</a> { <a class="el" href="group__Gpio__Exported__Types.html#gga7df105f2d110525f5323d56216255c32a900f1b0ff62985ed1bfcc929dcfc84bb">S2LP_GPIO_0</a> = GPIO0_CONF_ADDR,
<a class="el" href="group__Gpio__Exported__Types.html#gga7df105f2d110525f5323d56216255c32aee85e4f89e0d13a74e992e635d9f425b">S2LP_GPIO_1</a> = GPIO1_CONF_ADDR,
<a class="el" href="group__Gpio__Exported__Types.html#gga7df105f2d110525f5323d56216255c32a6071e9f3d6c6e0865ded154d8f0e06a3">S2LP_GPIO_2</a> = GPIO2_CONF_ADDR,
<a class="el" href="group__Gpio__Exported__Types.html#gga7df105f2d110525f5323d56216255c32afa825326e022f5f304b99420ccf7ae27">S2LP_GPIO_3</a> = GPIO3_CONF_ADDR
}</td></tr>
<tr class="memdesc:ga7df105f2d110525f5323d56216255c32"><td class="mdescLeft"> </td><td class="mdescRight">S2LP GPIO pin enumeration. <a href="group__Gpio__Exported__Types.html#ga7df105f2d110525f5323d56216255c32">More...</a><br /></td></tr>
<tr class="separator:ga7df105f2d110525f5323d56216255c32"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga93afc54d4cda634c7c5cbf8a69013b5a"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Types.html#ga93afc54d4cda634c7c5cbf8a69013b5a">S2LPGpioMode</a> { <a class="el" href="group__Gpio__Exported__Types.html#gga93afc54d4cda634c7c5cbf8a69013b5aa0cd5f9cacf06ad12036f6a7f80226f2d">S2LP_GPIO_MODE_DIGITAL_INPUT</a> = 0x01,
<a class="el" href="group__Gpio__Exported__Types.html#gga93afc54d4cda634c7c5cbf8a69013b5aac810a8e28d74a3c7c191a885498a3230">S2LP_GPIO_MODE_DIGITAL_OUTPUT_LP</a>,
<a class="el" href="group__Gpio__Exported__Types.html#gga93afc54d4cda634c7c5cbf8a69013b5aa9c485645be8164a03201f2239103d3e3">S2LP_GPIO_MODE_DIGITAL_OUTPUT_HP</a>
}</td></tr>
<tr class="memdesc:ga93afc54d4cda634c7c5cbf8a69013b5a"><td class="mdescLeft"> </td><td class="mdescRight">S2LP GPIO mode enumeration. <a href="group__Gpio__Exported__Types.html#ga93afc54d4cda634c7c5cbf8a69013b5a">More...</a><br /></td></tr>
<tr class="separator:ga93afc54d4cda634c7c5cbf8a69013b5a"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga16e1c622c4a0a136f26724b992b32586"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Types.html#ga16e1c622c4a0a136f26724b992b32586">S2LPGpioIO</a> { <br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586adbe0a1a72a4081c1338c6cf505512634">S2LP_GPIO_DIG_OUT_IRQ</a> = 0x00,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586aef492b875f6a662fc81274f08ed65f5d">S2LP_GPIO_DIG_OUT_POR_INV</a> = 0x08,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a7327deb1224f325efcaed2741016c55e">S2LP_GPIO_DIG_OUT_WUT_EXP</a> = 0x10,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586ac5973b7487f6d2a04470ca2187289d5d">S2LP_GPIO_DIG_OUT_LBD</a> = 0x18,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a388aba90927886eb12847e9f37e52ecd">S2LP_GPIO_DIG_OUT_TX_DATA</a> = 0x20,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a59ffea146a21dc8b7cd5765d8c194b61">S2LP_GPIO_DIG_OUT_TX_STATE</a> = 0x28,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a412d7090066126d92d198caf506c3dda">S2LP_GPIO_DIG_OUT_TXRX_FIFO_ALMOST_EMPTY</a> = 0x30,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a7aa9e116dd1ea7f6c385e44056119401">S2LP_GPIO_DIG_OUT_TXRX_FIFO_ALMOST_FULL</a> = 0x38,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a38b3419744bdc7c99cbc81fb1b779f36">S2LP_GPIO_DIG_OUT_RX_DATA</a> = 0x40,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a2fa15d5b27a06373b38cedc9ec7974b1">S2LP_GPIO_DIG_OUT_RX_CLOCK</a> = 0x48,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586ade8eff2358e7c9ffb2d43b3d90570ca2">S2LP_GPIO_DIG_OUT_RX_STATE</a> = 0x50,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a78524a5194a4e7275462d3416eb13335">S2LP_GPIO_DIG_OUT_NOT_STANDBY_SLEEP</a> = 0x58,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586adfd8c2672be1801ef3b0fbc4774fb80d">S2LP_GPIO_DIG_OUT_STANDBY</a> = 0x60,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a33d268b6e915d276caa155e3460fae8d">S2LP_GPIO_DIG_OUT_ANTENNA_SWITCH</a> = 0x68,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586af5af0ccfafd117937bb02ca24850ef1f">S2LP_GPIO_DIG_OUT_VALID_PREAMBLE</a> = 0x70,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a4d85c45ca360f94558eb9e50da70a16a">S2LP_GPIO_DIG_OUT_SYNC_DETECTED</a> = 0x78,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a7230810a3d1b621fd657950ef5333975">S2LP_GPIO_DIG_OUT_RSSI_THRESHOLD</a> = 0x80,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a5ee801e605a8c91cfa8f3fe9ae888b53">S2LP_GPIO_DIG_OUT_MCU_CLOCK</a> = 0x88,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586afbd23d457fe36083788cd7eda1b94ec2">S2LP_GPIO_DIG_OUT_TX_RX_MODE</a> = 0x90,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a76a492cf96fdde125b2535558d2402c7">S2LP_GPIO_DIG_OUT_VDD</a> = 0x98,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a7169ff5a7c6c494bea311deb8f1105dd">S2LP_GPIO_DIG_OUT_GND</a> = 0xA0,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586ab4ec968e7a45c7284668793df22ee176">S2LP_GPIO_DIG_OUT_SMPS_EXT</a> = 0xA8,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a2d4692abe0a56c54b532d586ac87dc5c">S2LP_GPIO_DIG_OUT_SLEEP</a> = 0xB0,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a788983b8a6cc6e24d9d2600e915537d3">S2LP_GPIO_DIG_OUT_READY</a> = 0xB8,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586aa54dfdf92e328115666cfc373fd490bf">S2LP_GPIO_DIG_OUT_LOCK</a> = 0xC0,
<a class="el" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586a7737af318de51325e11f6d932aad601a">S2LP_GPIO_DIG_OUT_WAIT_FOR_LOCK_SIG</a> = 0xC8
<br />
}</td></tr>
<tr class="memdesc:ga16e1c622c4a0a136f26724b992b32586"><td class="mdescLeft"> </td><td class="mdescRight">S2LP I/O selection enumeration. <a href="group__Gpio__Exported__Types.html#ga16e1c622c4a0a136f26724b992b32586">More...</a><br /></td></tr>
<tr class="separator:ga16e1c622c4a0a136f26724b992b32586"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga6bcb6b3fe3d480eff62b980e53515a37"><td class="memItemLeft" align="right" valign="top"><a id="ga6bcb6b3fe3d480eff62b980e53515a37"></a>enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Types.html#ga6bcb6b3fe3d480eff62b980e53515a37">OutputLevel</a> </td></tr>
<tr class="memdesc:ga6bcb6b3fe3d480eff62b980e53515a37"><td class="mdescLeft"> </td><td class="mdescRight">S2LP OutputLevel enumeration. <br /></td></tr>
<tr class="separator:ga6bcb6b3fe3d480eff62b980e53515a37"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaed522d2538ab5042acbb546d6aff752c"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Types.html#gaed522d2538ab5042acbb546d6aff752c">ClockOutputXOPrescaler</a> { <br />
  <a class="el" href="group__Gpio__Exported__Types.html#ggaed522d2538ab5042acbb546d6aff752ca3ca0281ee4a42897ebcfd7456e58a4f9">XO_RATIO_1</a> = 0x00,
<a class="el" href="group__Gpio__Exported__Types.html#ggaed522d2538ab5042acbb546d6aff752ca038172d81af6cb1ded2433cd183d9ac0">XO_RATIO_1_2</a> = 0x02,
<a class="el" href="group__Gpio__Exported__Types.html#ggaed522d2538ab5042acbb546d6aff752ca9106ca93d80e7991ea638ead2d8078ee">XO_RATIO_1_4</a> = 0x04,
<a class="el" href="group__Gpio__Exported__Types.html#ggaed522d2538ab5042acbb546d6aff752ca3a6e2e7382e960733da31da1c85b97ba">XO_RATIO_1_8</a> = 0x06,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#ggaed522d2538ab5042acbb546d6aff752cabb445172e4aafe56322d5bd4aba890b7">XO_RATIO_1_16</a> = 0x08,
<a class="el" href="group__Gpio__Exported__Types.html#ggaed522d2538ab5042acbb546d6aff752ca3722b8a84dab1b2694b0c61dec4fe93f">XO_RATIO_1_32</a> = 0x0A,
<a class="el" href="group__Gpio__Exported__Types.html#ggaed522d2538ab5042acbb546d6aff752cab3da7c810fcc29882d683b2c2bc48caf">XO_RATIO_1_64</a> = 0x0C,
<a class="el" href="group__Gpio__Exported__Types.html#ggaed522d2538ab5042acbb546d6aff752ca003e4214e14d774a0f2aaa2c8443c8cf">XO_RATIO_1_128</a> = 0x0E,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#ggaed522d2538ab5042acbb546d6aff752ca2eb34890edae34f1c5631811a2d163a5">XO_RATIO_1_256</a> = 0x10
<br />
}</td></tr>
<tr class="memdesc:gaed522d2538ab5042acbb546d6aff752c"><td class="mdescLeft"> </td><td class="mdescRight">S2LP clock output XO prescaler enumeration. <a href="group__Gpio__Exported__Types.html#gaed522d2538ab5042acbb546d6aff752c">More...</a><br /></td></tr>
<tr class="separator:gaed522d2538ab5042acbb546d6aff752c"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gafb04dca9bd7d6b37301b6ceed8b7b468"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Types.html#gafb04dca9bd7d6b37301b6ceed8b7b468">ClockOutputRCOPrescaler</a> { <a class="el" href="group__Gpio__Exported__Types.html#ggafb04dca9bd7d6b37301b6ceed8b7b468ae9ee781aea60b8bb046b15b40da1f779">RCO_RATIO_1</a> = 0x00,
<a class="el" href="group__Gpio__Exported__Types.html#ggafb04dca9bd7d6b37301b6ceed8b7b468aefef9869802b5c0c801d5c866fda7eaf">RCO_RATIO_1_128</a>
}</td></tr>
<tr class="memdesc:gafb04dca9bd7d6b37301b6ceed8b7b468"><td class="mdescLeft"> </td><td class="mdescRight">S2LP Clock Output RCO prescaler enumeration. <a href="group__Gpio__Exported__Types.html#gafb04dca9bd7d6b37301b6ceed8b7b468">More...</a><br /></td></tr>
<tr class="separator:gafb04dca9bd7d6b37301b6ceed8b7b468"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga0506d7b1a1515cdd9c354f27f4f74e50"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Types.html#ga0506d7b1a1515cdd9c354f27f4f74e50">ExtraClockCycles</a> { <a class="el" href="group__Gpio__Exported__Types.html#gga0506d7b1a1515cdd9c354f27f4f74e50a179a22c50f3e61f20be1db0b5f48aea6">EXTRA_CLOCK_CYCLES_0</a> = 0x00,
<a class="el" href="group__Gpio__Exported__Types.html#gga0506d7b1a1515cdd9c354f27f4f74e50aa52891365d890f75f748e842639a97b0">EXTRA_CLOCK_CYCLES_128</a> = 0x20,
<a class="el" href="group__Gpio__Exported__Types.html#gga0506d7b1a1515cdd9c354f27f4f74e50abf1b0dd40dd4b439c7d5f004c7e6598c">EXTRA_CLOCK_CYCLES_256</a> = 0x40,
<a class="el" href="group__Gpio__Exported__Types.html#gga0506d7b1a1515cdd9c354f27f4f74e50af2ee9d344e19064743882f243d28ac19">EXTRA_CLOCK_CYCLES_512</a> = 0x60
}</td></tr>
<tr class="memdesc:ga0506d7b1a1515cdd9c354f27f4f74e50"><td class="mdescLeft"> </td><td class="mdescRight">S2LP ExtraClockCycles enumeration. <a href="group__Gpio__Exported__Types.html#ga0506d7b1a1515cdd9c354f27f4f74e50">More...</a><br /></td></tr>
<tr class="separator:ga0506d7b1a1515cdd9c354f27f4f74e50"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga32b0f7ba71811d0cff33699697f6c550"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Types.html#ga32b0f7ba71811d0cff33699697f6c550">IrqList</a> { <br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a1e92cdb4909cf182a0f53feff3a1a072">RX_DATA_READY</a> = 0x00000001,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a7c348d4984fba627444c5b56cf76c594">RX_DATA_DISC</a> = 0x00000002,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550addf69306b8e03ba22de441cac30470ae">TX_DATA_SENT</a> = 0x00000004,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a3937bcbb5f83411d21a0da713e5dc531">MAX_RE_TX_REACH</a> = 0x00000008,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a8a393db133e073ad8bac2f92e78d6f5d">CRC_ERROR</a> = 0x00000010,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550afda99f6582107168d593e29c1ebad243">TX_FIFO_ERROR</a> = 0x00000020,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a504b193a9137096ccfebbaaea7f45c91">RX_FIFO_ERROR</a> = 0x00000040,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a97453d10e8b4cce000bbad969354ac08">TX_FIFO_ALMOST_FULL</a> = 0x00000080,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a166d8a6ca6ce4fb48e8429b508375dd5">TX_FIFO_ALMOST_EMPTY</a> = 0x00000100,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550ac931a9615b2c9fbbda860d769016433c">RX_FIFO_ALMOST_FULL</a> = 0x00000200,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550aa68eae05f2d12181be4bb7720c6ad39a">RX_FIFO_ALMOST_EMPTY</a> = 0x00000400,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a010c487e83abbd6444abfaa8af37481a">MAX_BO_CCA_REACH</a> = 0x00000800,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550ab98e17a6b46e283ce81208be3011a32e">VALID_PREAMBLE</a> = 0x00001000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a0ab351f7cb92080494c70131d6fdad27">VALID_SYNC</a> = 0x00002000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550ae0667c4c85d88a43a2e518ca74c2ac2e">RSSI_ABOVE_TH</a> = 0x00004000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550ad5afe7ea067a7d2e5819ee2d22f9f213">WKUP_TOUT_LDC</a> = 0x00008000,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a6564f2f3e15be06b670547bbcaaf0798">READY</a> = 0x00010000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a05a50d54177603eae89d87d8332aae9d">STANDBY_DELAYED</a> = 0x00020000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a250ef6a56885ece2e3e1eb29574f08ff">LOW_BATT_LVL</a> = 0x00040000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550ad65e629267df5fdedaef8709af31a380">POR</a> = 0x00080000,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550acc9c9b77f3b91e71abfa752a1efd7735">BOR</a> = 0x00100000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a438b68412f24003b09e0993b62dc7b48">LOCK</a> = 0x00200000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550ad08526be2acb8a49e337ba22cae6e5cf">VCO_CALIBRATION_END</a> = 0x00400000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a6439fa9977f18a35ea824248ec94ff81">PA_CALIBRATION_END</a> = 0x00800000,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550afb0803b355c41f82d39ff18af34cea8f">PM_COUNT_EXPIRED</a> = 0x01000000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a86170ef526deea1662997000a404af3f">XO_COUNT_EXPIRED</a> = 0x02000000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a0a836f224a604988b68608be53e8dc7b">TX_START_TIME</a> = 0x04000000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550af75dbc6fc101d2b28f11ad335077de06">RX_START_TIME</a> = 0x08000000,
<br />
  <a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550af664ba0fb57bbf816c8b80996e8c0678">RX_TIMEOUT</a> = 0x10000000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550a27c051bf0f1a3765ab533bc255593529">RX_SNIFF_TIMEOUT</a> = 0x20000000,
<a class="el" href="group__Gpio__Exported__Types.html#gga32b0f7ba71811d0cff33699697f6c550adaab60c4aec9777ba611b9002668a187">ALL_IRQ</a> = 0x7FFFFFFF
<br />
}</td></tr>
<tr class="memdesc:ga32b0f7ba71811d0cff33699697f6c550"><td class="mdescLeft"> </td><td class="mdescRight">IRQ list enumeration for S2LP. This enumeration type can be used to address a specific IRQ. <a href="group__Gpio__Exported__Types.html#ga32b0f7ba71811d0cff33699697f6c550">More...</a><br /></td></tr>
<tr class="separator:ga32b0f7ba71811d0cff33699697f6c550"><td class="memSeparator" colspan="2"> </td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga9f76fe5d7bf5a9f4da911cb2a4b05552"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Functions.html#ga9f76fe5d7bf5a9f4da911cb2a4b05552">S2LPGpioInit</a> (<a class="el" href="structSGpioInit.html">SGpioInit</a> *pxGpioInitStruct)</td></tr>
<tr class="memdesc:ga9f76fe5d7bf5a9f4da911cb2a4b05552"><td class="mdescLeft"> </td><td class="mdescRight">Initialize the S2LP GPIOx according to the specified parameters in the pxGpioInitStruct. <a href="group__Gpio__Exported__Functions.html#ga9f76fe5d7bf5a9f4da911cb2a4b05552">More...</a><br /></td></tr>
<tr class="separator:ga9f76fe5d7bf5a9f4da911cb2a4b05552"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaac84767d549c2cdd939978381764df5e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Functions.html#gaac84767d549c2cdd939978381764df5e">S2LPGpioSetLevel</a> (<a class="el" href="group__Gpio__Exported__Types.html#ga7df105f2d110525f5323d56216255c32">S2LPGpioPin</a> xGpioX, <a class="el" href="group__Gpio__Exported__Types.html#ga6bcb6b3fe3d480eff62b980e53515a37">OutputLevel</a> xLevel)</td></tr>
<tr class="memdesc:gaac84767d549c2cdd939978381764df5e"><td class="mdescLeft"> </td><td class="mdescRight">Force S2LP GPIO_x configured as digital output, to VDD or GND. <a href="group__Gpio__Exported__Functions.html#gaac84767d549c2cdd939978381764df5e">More...</a><br /></td></tr>
<tr class="separator:gaac84767d549c2cdd939978381764df5e"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga78d1cd27247529b5cae0f3193bc3b207"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__Gpio__Exported__Types.html#ga6bcb6b3fe3d480eff62b980e53515a37">OutputLevel</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Functions.html#ga78d1cd27247529b5cae0f3193bc3b207">S2LPGpioGetLevel</a> (<a class="el" href="group__Gpio__Exported__Types.html#ga7df105f2d110525f5323d56216255c32">S2LPGpioPin</a> xGpioX)</td></tr>
<tr class="memdesc:ga78d1cd27247529b5cae0f3193bc3b207"><td class="mdescLeft"> </td><td class="mdescRight">Return output value (VDD or GND) of S2LP GPIO_x, when it is configured as digital output. <a href="group__Gpio__Exported__Functions.html#ga78d1cd27247529b5cae0f3193bc3b207">More...</a><br /></td></tr>
<tr class="separator:ga78d1cd27247529b5cae0f3193bc3b207"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga4269a13f2863a2b271d92c1db772f425"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Functions.html#ga4269a13f2863a2b271d92c1db772f425">S2LPGpioIrqDeInit</a> (<a class="el" href="structS2LPIrqs.html">S2LPIrqs</a> *pxIrqInit)</td></tr>
<tr class="memdesc:ga4269a13f2863a2b271d92c1db772f425"><td class="mdescLeft"> </td><td class="mdescRight">Deinit the <a class="el" href="structS2LPIrqs.html" title="IRQ bitfield structure for S2LP. This structure is used to read or write the single IRQ bit....">S2LPIrqs</a> structure setting all the bitfield to 0. Moreover, it sets the IRQ mask registers to 0x00000000, disabling all IRQs. <a href="group__Gpio__Exported__Functions.html#ga4269a13f2863a2b271d92c1db772f425">More...</a><br /></td></tr>
<tr class="separator:ga4269a13f2863a2b271d92c1db772f425"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gac63624ada357281aa737e6b96163a844"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Functions.html#gac63624ada357281aa737e6b96163a844">S2LPGpioIrqInit</a> (<a class="el" href="structS2LPIrqs.html">S2LPIrqs</a> *pxIrqInit)</td></tr>
<tr class="memdesc:gac63624ada357281aa737e6b96163a844"><td class="mdescLeft"> </td><td class="mdescRight">Enable the IRQs according to the user defined pxIrqInit structure. <a href="group__Gpio__Exported__Functions.html#gac63624ada357281aa737e6b96163a844">More...</a><br /></td></tr>
<tr class="separator:gac63624ada357281aa737e6b96163a844"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga54fe9ae87c6fb6a2d89098fb7bd54c5b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Functions.html#ga54fe9ae87c6fb6a2d89098fb7bd54c5b">S2LPGpioIrqConfig</a> (<a class="el" href="group__Gpio__Exported__Types.html#ga32b0f7ba71811d0cff33699697f6c550">IrqList</a> xIrq, <a class="el" href="group__Types__Exported__Types.html#gaf4cbf41d3c8f611d12adae5d2c29c3c2">SFunctionalState</a> xNewState)</td></tr>
<tr class="memdesc:ga54fe9ae87c6fb6a2d89098fb7bd54c5b"><td class="mdescLeft"> </td><td class="mdescRight">Enable or disables a specific IRQ. <a href="group__Gpio__Exported__Functions.html#ga54fe9ae87c6fb6a2d89098fb7bd54c5b">More...</a><br /></td></tr>
<tr class="separator:ga54fe9ae87c6fb6a2d89098fb7bd54c5b"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga5f6dfbae6f963884e493a3e581fecc81"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Functions.html#ga5f6dfbae6f963884e493a3e581fecc81">S2LPGpioIrqGetMask</a> (<a class="el" href="structS2LPIrqs.html">S2LPIrqs</a> *pxIrqMask)</td></tr>
<tr class="memdesc:ga5f6dfbae6f963884e493a3e581fecc81"><td class="mdescLeft"> </td><td class="mdescRight">Fill a pointer to a structure of <a class="el" href="structS2LPIrqs.html" title="IRQ bitfield structure for S2LP. This structure is used to read or write the single IRQ bit....">S2LPIrqs</a> type reading the IRQ_MASK registers. <a href="group__Gpio__Exported__Functions.html#ga5f6dfbae6f963884e493a3e581fecc81">More...</a><br /></td></tr>
<tr class="separator:ga5f6dfbae6f963884e493a3e581fecc81"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gadc65c545de2674d60a4eeef172d027fa"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Functions.html#gadc65c545de2674d60a4eeef172d027fa">S2LPGpioIrqGetStatus</a> (<a class="el" href="structS2LPIrqs.html">S2LPIrqs</a> *pxIrqStatus)</td></tr>
<tr class="memdesc:gadc65c545de2674d60a4eeef172d027fa"><td class="mdescLeft"> </td><td class="mdescRight">Fill a pointer to a structure of <a class="el" href="structS2LPIrqs.html" title="IRQ bitfield structure for S2LP. This structure is used to read or write the single IRQ bit....">S2LPIrqs</a> type reading the IRQ_STATUS registers. <a href="group__Gpio__Exported__Functions.html#gadc65c545de2674d60a4eeef172d027fa">More...</a><br /></td></tr>
<tr class="separator:gadc65c545de2674d60a4eeef172d027fa"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gabad50bd7954d6fb8bc47ce8a2783814a"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Functions.html#gabad50bd7954d6fb8bc47ce8a2783814a">S2LPGpioIrqClearStatus</a> (void)</td></tr>
<tr class="memdesc:gabad50bd7954d6fb8bc47ce8a2783814a"><td class="mdescLeft"> </td><td class="mdescRight">Clear the IRQ status registers. <a href="group__Gpio__Exported__Functions.html#gabad50bd7954d6fb8bc47ce8a2783814a">More...</a><br /></td></tr>
<tr class="separator:gabad50bd7954d6fb8bc47ce8a2783814a"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaaeb5b182330946a86dd23936c17a57ea"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__Types__Exported__Types.html#gabfbd40443272561261cf6e48ac7c3225">SBool</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Gpio__Exported__Functions.html#gaaeb5b182330946a86dd23936c17a57ea">S2LPGpioIrqCheckFlag</a> (<a class="el" href="group__Gpio__Exported__Types.html#ga32b0f7ba71811d0cff33699697f6c550">IrqList</a> xFlag)</td></tr>
<tr class="memdesc:gaaeb5b182330946a86dd23936c17a57ea"><td class="mdescLeft"> </td><td class="mdescRight">Verifie if a specific IRQ has been generated. The call resets all the IRQ status, so it can't be used in case of multiple raising interrupts. <a href="group__Gpio__Exported__Functions.html#gaaeb5b182330946a86dd23936c17a57ea">More...</a><br /></td></tr>
<tr class="separator:gaaeb5b182330946a86dd23936c17a57ea"><td class="memSeparator" colspan="2"> </td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><dl class="section author"><dt>Author</dt><dd>LowPower RF BU - AMG </dd></dl>
<dl class="section version"><dt>Version</dt><dd>1.2.1 </dd></dl>
<dl class="section date"><dt>Date</dt><dd>16-April-2018</dd></dl>
<p>This module can be used to configure the S2-LP GPIO pins to perform specific functions. The structure <em>gpioIRQ</em> can be used to specify these features for one of the four S2-LP Gpio pin. The following example shows how to configure a pin (GPIO 3) to be used as an IRQ source for a microcontroller using the <em><a class="el" href="group__Gpio__Exported__Functions.html#ga9f76fe5d7bf5a9f4da911cb2a4b05552">S2LPGpioInit()</a></em> function.</p>
<p><b>Example:</b> </p><div class="fragment"><div class="line"><a class="code" href="structSGpioInit.html">SGpioInit</a> gpioIRQ={</div><div class="line"> <a class="code" href="group__Gpio__Exported__Types.html#gga7df105f2d110525f5323d56216255c32afa825326e022f5f304b99420ccf7ae27">S2LP_GPIO_3</a>,</div><div class="line"> <a class="code" href="group__Gpio__Exported__Types.html#gga93afc54d4cda634c7c5cbf8a69013b5aac810a8e28d74a3c7c191a885498a3230">S2LP_GPIO_MODE_DIGITAL_OUTPUT_LP</a>,</div><div class="line"> <a class="code" href="group__Gpio__Exported__Types.html#gga16e1c622c4a0a136f26724b992b32586adbe0a1a72a4081c1338c6cf505512634">S2LP_GPIO_DIG_OUT_IRQ</a></div><div class="line">};</div><div class="line"></div><div class="line">...</div><div class="line"></div><div class="line">S2LPGpioInit(&gpioIRQ);</div></div><!-- fragment --><dl class="section note"><dt>Note</dt><dd>Please read the functions documentation for the other GPIO features.</dd></dl>
<p>THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.</p>
<p>THIS SOURCE CODE IS PROTECTED BY A LICENSE. FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.</p>
<h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2>
<p class="definition">Definition in file <a class="el" href="S2LP__Gpio_8h_source.html">S2LP_Gpio.h</a>.</p>
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