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i2c.lst
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0001 0000
0002 0000 ;************************************************
0003 0000 ; 8039 Quarz = 3,6864 Mhz *
0004 0000 ; f = 3,6864 Mhz / 3 = 1,2288 Mhz *
0005 0000 ; ALE = CLK / 5 = 245,76 kHz = 4,069 us *
0006 0000 ; TCLK int = ALE / 32 = 7,68 kHz = 130,2083 us *
0007 0000 ; 1 cyc = 4,069 us *
0008 0000 ; 1 timer tick = 130 us *
0009 0000 ; Syntax: Telemark TASM Version 3.2 *
0010 0000 ;************************************************
0011 0000
0012 0000 #include "mc1000.inc";
0001+ 0000
0002+ 0000 NUL = $00 ; null value
0003+ 0000 CR = $0d ; Carrage return
0004+ 0000 LF = $0A ; Line feed
0005+ 0000
0006+ 0000 b_WD = $80 ; watchdog bit
0007+ 0000
0008+ 0000 ZP_SW1 = $20 ; result of switch #1 (call rdSW12)
0009+ 0000 ZP_SW2 = $21 ; result of switch #2 (call rdSW12)
0010+ 0000 ZP_22 = $22 ; rescue 8b (b82HEX))
0011+ 0000 ZP_LNIB = $23 ; low nibble result of 8b
0012+ 0000 ZP_HNIB = $24 ; high nibble result of 8b
0013+ 0000 ZP_25 = $25 ; working nibble result
0014+ 0000 ZP_26 = $26 ; last pressed raw key 7279
0015+ 0000
0016+ 0000 ZP_29 = $29 ; start textbuffer (2 x textlength)
0017+ 0000
0018+ 0000
0019+ 0000
0013 0000 #include "i2c.inc";
0001+ 0000
0002+ 0000
0003+ 0000 ; Displayram address
0004+ 0000 ; 2 x 16 = $00-$0F, $40-$4F
0005+ 0000 ; 4 x 20 = $00-$13, $40-$53, $14-$27, $54-$67
0006+ 0000
0007+ 0000
0008+ 0000 SCL = 0 ; P10
0009+ 0000 SDA = 1 ; P11
0010+ 0000
0011+ 0000 STARTTXTBUF = ZP_29
0014 0000
0015 0000
0016 0000 .org 0000h
0017 0000
0018 0000 04 20 _RESET jmp INIT ; reset sprungadresse
0019 0002 00 nop
0020 0003 04 8E _INT jmp INTERRUPT ; interrupt sprungadresse
0021 0005 00 nop
0022 0006 00 nop
0023 0007 04 8D _TINT jmp TIMERINT ; timer interrupt sprungadresse
0024 0009 00 nop
0025 000A
0026 0010 .org 0010h
0027 0010 ; Platz fuer 16 Byte EPROM ID
0028 0010 30 31 32 33 .byte "0123456789abcdef"
0028 0014 34 35 36 37
0028 0018 38 39 61 62
0028 001C 63 64 65 66
0029 0020
0030 0020 ; ---------------- init --------------------
0031 0020 15 INIT dis i ; (1 cyc) interrupt verhindern
0032 0021 35 dis tcnti ; (1 cyc) timer interrupt verhindern
0033 0022 75 ent0 clk ; (1 cyc) T0 prozessortakt ausgeben
0034 0023
0035 0023 14 55 call I2CINIT ; init i2c - SDA and SCL high
0036 0025
0037 0025 14 64 LOOP call rdSW12 ; read SW1 & SW2
0038 0027
0039 0027 14 58 call I2CSTART ; start of I2C sequence
0040 0029
0041 0029 ; i2c address byte
0042 0029 B8 20 mov r0,#$ZP_SW1 ; SW1 i2c address
0043 002B F0 mov a,@r0 ; i2c 7-bit address
0044 002C E7 rl a ; adapt SW1 to address, b0= 0 (write)
0045 002D 14 3A call I2COUT ; write pattern of SW1 as address
0046 002F
0047 002F ; i2c data byte
0048 002F B8 21 mov r0,#$ZP_SW2 ; SW2 i2c data
0049 0031 F0 mov a,@r0 ; i2c 8-bit data
0050 0032 ;mov a,#$(%01010101)
0051 0032 14 3A call I2COUT ; write pattern of SW2 as data
0052 0034
0053 0034 14 5F call I2CSTOP ; STOP of I2C sequence
0054 0036
0055 0036 14 88 call WATCHDOG ; trigger watchdog
0056 0038 04 25 jmp LOOP ; loop again
0057 003A
0058 003A
0059 003A ;*****************************************
0060 003A ; I2C write out address/date
0061 003A ; SDA & SCL should be low before
0062 003A ; data must be stable before and after clock
0063 003A ; A= address/data -> R3
0064 003A ; r0= temp bitcounter
0065 003A ; r3= temp address/data
0066 003A ;*****************************************
0067 003A I2COUT ; SDA & SCL should here be low
0068 003A B8 08 mov r0,#$08 ; set bitcounter to 8-bit
0069 003C
0070 003C ; loop over 8-bit adress+RW/data
0071 003C AB I2CB01 mov r3,a ; set A to temp adress/data
0072 003D 97 clr c ; prerpare carry
0073 003E FB mov a,r3 ; load temp adress/data
0074 003F F7 rlc a ; shift bit out into carry
0075 0040 F6 44 jc I2CB1 ; bit set
0076 0042 04 46 jmp I2CB2 ; bit clear
0077 0044 89 02 I2CB1 orl p1,#$(1 << SDA) ; SDA high, bit rising
0078 0046 89 01 I2CB2 orl p1,#$(1 << SCL) ; SCL high, clock rising
0079 0048 99 FE anl p1,#~(1 << SCL) ; SCL low, clock falling
0080 004A 99 FD anl p1,#~(1 << SDA) ; SDA low, bit falling
0081 004C E8 3C djnz r0,I2CB01 ; decrement bitcounter,next loop r0>0
0082 004E
0083 004E ; check bit-9 AKN/NAKN
0084 004E 89 01 orl p1,#$(1 << SCL) ; SCL high, clock rising
0085 0050 09 in a,p1 ; read P1x
0086 0051 00 nop ; result of AKN/NAKN TBD
0087 0052 99 FE anl p1,#~(1 << SCL) ; SCL low, clock falling
0088 0054
0089 0054 83 ret ; Bye
0090 0055
0091 0055
0092 0055 ;*****************************************
0093 0055 ; I2C init sequence
0094 0055 ;*****************************************
0095 0055 I2CINIT
0096 0055 89 03 orl p1,#$((1 << SDA)|(1 << SCL)) ; SDA & SCL high
0097 0057 83 ret
0098 0058
0099 0058
0100 0058 ;*****************************************
0101 0058 ; I2C start sequence
0102 0058 ; SDA & SCL should be low before
0103 0058 ;*****************************************
0104 0058 I2CSTART
0105 0058 89 03 orl p1,#$((1 << SDA)|(1 << SCL)) ; SDA & SCL high
0106 005A 99 FD anl p1,#~(1 << SDA) ; SDA low, SCL high
0107 005C 99 FC anl p1,#~((1 << SDA)|(1 << SCL)) ; SDA & SCL low
0108 005E 83 ret ;
0109 005F
0110 005F
0111 005F ;*****************************************
0112 005F ; I2C start sequence
0113 005F ; SDA & SCL should be low before
0114 005F ;*****************************************
0115 005F I2CSTOP
0116 005F 89 01 orl p1,#$(1 << SCL) ; SCL high
0117 0061 89 03 orl p1,#$((1 << SDA)|(1 << SCL)) ; SDA & SCL high
0118 0063 83 ret ;
0119 0064
0120 0064
0121 0064 ;************************************************
0122 0064 ; Load SW1/SW2
0123 0064 ; R3/R4= temporary result of SW1/SW2
0124 0064 ; P10-13= used for address counting
0125 0064 ; $20= result of SW1
0126 0064 ; $21= result of SW2
0127 0064 ;************************************************
0128 0064 rdSW12:
0129 0064 23 10 mov a,#$10 ; init value-corunter
0130 0066 AA mov r2,a ; with %00010000
0131 0067 L0332:
0132 0067 FB mov a,r3 ; move SW counter from r3
0133 0068 AC mov r4,a ; to SW counter r4
0134 0069 L0334:
0135 0069 CA dec r2 ; value-counter r2--
0136 006A 09 in a,p1 ; load current value of port1
0137 006B 53 F0 anl a,#$F0 ; cut low nibble
0138 006D 4A orl a,r2 ; "add" value-counter r2 into
0139 006E 39 outl p1,a ; write back to port1
0140 006F FB mov a,r3 ; load A with r3
0141 0070 97 clr c ; clear carry
0142 0071 56 74 jt1 L033F ; SW is "On"?
0143 0073 A7 cpl c ; set carry (inverted val)
0144 0074 L033F:
0145 0074 F7 rlc a ; fill value with carry from right
0146 0075 AB mov r3,a ; store result to counter r3
0147 0076 FA mov a,r2 ; load counter r2
0148 0077 72 67 jb3 L0332 ; bit 3 set (SW2 active)?
0149 0079 53 0F anl a,#$0F ; cut high nibble
0150 007B C6 7F jz L034A ; value-counter clear
0151 007D 04 69 jmp L0334 ; next loop, SW counter -> r4
0152 007F L034A:
0153 007F B8 20 mov r0,#ZP_SW1 ; set index ZP $20
0154 0081 FB mov a,r3 ; store result from r3
0155 0082 A0 mov @r0,a ; to RAM $20
0156 0083 B8 21 mov r0,#ZP_SW2 ; set index ZP $21
0157 0085 FC mov a,r4 ; store result from r4
0158 0086 A0 mov @r0,a ; to RAM $21
0159 0087 83 ret ; bye
0160 0088
0161 0088
0162 0088 ;************************************************
0163 0088 ; Load SW1/SW2
0164 0088 ; R3/R4= temporary result of SW1/SW2
0165 0088 ; $20= result of SW1
0166 0088 ; $21= result of SW2
0167 0088 ;************************************************
0168 0088 ;rdSW12:
0169 0088 ; mov a,#$10 ; init value-corunter
0170 0088 ; mov r2,a ; with %00010000
0171 0088 ; ;mov r3,#$00
0172 0088 ;L0332:
0173 0088 ; mov a,r3 ; move SW1 counter from r3
0174 0088 ; mov r4,a ; to SW2 counter r4
0175 0088 ;L0334:
0176 0088 ; dec r2 ; value-counter r2--
0177 0088 ; in a,p1 ; load current value of port1
0178 0088 ; anl a,#$F0 ; cut low nibble
0179 0088 ; orl a,r2 ; "add" value-counter r2 into
0180 0088 ;
0181 0088 ; orl a,#$(1<<SCL)|(1 << SDA)
0182 0088 ;
0183 0088 ; outl p1,a ; write back to port1
0184 0088 ; mov a,r3 ; load A with r3
0185 0088 ; clr c ; clear carry
0186 0088 ; jt1 L033F ; SW is "On"?
0187 0088 ; cpl c ; set carry (inverted val)
0188 0088 ;L033F:
0189 0088 ; rlc a ; fill value with carry from right
0190 0088 ; mov r3,a ; store result to counter r3
0191 0088 ; mov a,r2 ; load counter r2
0192 0088 ; jb3 L0332 ; bit 3 set (SW2 active)?
0193 0088 ; anl a,#$0F ; cut high nibble
0194 0088 ; jz L034A ; value-counter clear
0195 0088 ; jmp L0334 ; next loop, SW counter -> r4
0196 0088 ;L034A:
0197 0088 ; mov r0,#ZP_SW1 ; set index ZP $20
0198 0088 ; mov a,r3 ; store result from r3
0199 0088 ; mov @r0,a ; to RAM $20
0200 0088 ; mov r0,#ZP_SW2 ; set index ZP $21
0201 0088 ; mov a,r4 ; store result from r4
0202 0088 ; mov @r0,a ; to RAM $21
0203 0088 ; ret ; bye
0204 0088
0205 0088
0206 0088 ;*****************************************
0207 0088 ; watchdog impuls |_|- high->low -> high *
0208 0088 ; must be execute at least each ~630ms *
0209 0088 ;*****************************************
0210 0088 WATCHDOG:
0211 0088 9A 7F anl p2,#$(~b_WD) ; (2 cyc) P27 Watchdog low
0212 008A 8A 80 orl p2,#b_WD ; (2 cyc) P27 Watchdog high
0213 008C 83 ret ; (2 cyc)
0214 008D
0215 008D
0216 008D ;***********************************************
0217 008D ; Timer interrupt routine *
0218 008D ;***********************************************
0219 008D TIMERINT:
0220 008D 93 retr
0221 008E
0222 008E
0223 008E ;***********************************************
0224 008E ; interrupt routine *
0225 008E ;***********************************************
0226 008E INTERRUPT:
0227 008E 93 retr ;
0228 008F
0229 008F
0230 008F
0231 008F .end
0232 008F
Type Key: N=NULL_SEG C=CODE_SEG B=BIT_SEG X=EXTD_SEG D=DATA_SEG
L=Local
E=Export
Value Type Label
----- ---- ------------------------------
000D N CR
0020 N INIT
003A N I2COUT
003C N I2CB01
0044 N I2CB1
0046 N I2CB2
0055 N I2CINIT
0058 N I2CSTART
005F N I2CSTOP
008E N INTERRUPT
000A N LF
0025 N LOOP
0067 N L0332
0069 N L0334
0074 N L033F
007F N L034A
0000 N NUL
0000 N SCL
0001 N SDA
0029 N STARTTXTBUF
008D N TIMERINT
0088 N WATCHDOG
0020 N ZP_SW1
0021 N ZP_SW2
0022 N ZP_22
0023 N ZP_LNIB
0024 N ZP_HNIB
0025 N ZP_25
0026 N ZP_26
0029 N ZP_29
0080 N b_WD
0000 NL noname._RESET
0003 NL noname._INT
0007 NL noname._TINT
0064 N rdSW12
ADDR 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
-----------------------------------------------------
0000 04 20 00 04 8E 00 00 04 8D 00 FF FF FF FF FF FF
0010 30 31 32 33 34 35 36 37 38 39 61 62 63 64 65 66
0020 15 35 75 14 55 14 64 14 58 B8 20 F0 E7 14 3A B8
0030 21 F0 14 3A 14 5F 14 88 04 25 B8 08 AB 97 FB F7
0040 F6 44 04 46 89 02 89 01 99 FE 99 FD E8 3C 89 01
0050 09 00 99 FE 83 89 03 83 89 03 99 FD 99 FC 83 89
0060 01 89 03 83 23 10 AA FB AC CA 09 53 F0 4A 39 FB
0070 97 56 74 A7 F7 AB FA 72 67 53 0F C6 7F 04 69 B8
0080 20 FB A0 B8 21 FC A0 83 9A 7F 8A 80 83 93 93 FF
tasm: Number of errors = 0